Ji Young Lee

US Patent:

6344378, Feb 5, 2002

Filed:

Mar 1, 1999

Appl. No.:

09/260231

Inventors:

Ji Ung Lee - Cohoes NY
John Lee - Meridian ID
Benham Moradi - Boise ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

H01L 21337

US Classification:

438180, 438142, 438189, 438299, 438301

Abstract:

The present invention includes field effect transistors, field emission apparatuses, thin film transistors, and methods of forming field effect transistors. According to one embodiment, a field effect transistor includes a semiconductive layer configured to form a channel region; a pair of spaced conductively doped semiconductive regions in electrical connection with the channel region of the semiconductive layer; a gate intermediate the semiconductive regions; and a gate dielectric layer intermediate the semiconductive layer and the gate, the gate dielectric layer being configured to align the gate with the channel region of the semiconductive layer. In one aspect, chemical-mechanical polishing self-aligns the gate with the channel region. According to another aspect, a field emission device includes a transistor configured to control the emission of electrons from an emitter.

US Patent:

6559506, May 6, 2003

Filed:

Apr 3, 2002

Appl. No.:

10/115829

Inventors:

Ji Ung Lee - Niskayuna NY
George Edward Possin - Niskayuna NY

Assignee:

General Electric Company - Schenectady NY

International Classification:

H01L 2701

US Classification:

257350, 257347, 257296

Abstract:

A radiation detector includes a top gate thin film transistor (TFT) including a source electrode, a drain electrode, a gate electrode, a TFT dielectric layer, a TFT semiconductive layer, and a TFT intrinsic amorphous silicon (a-Si) layer. The radiation detector also includes a capacitor including a first electrode, a second electrode substantially coplanar with the gate electrode, and a capacitor dielectric, the capacitor dielectric including a capacitor dielectric layer substantially coplanar with the TFT dielectric layer, a capacitor semiconductive layer substantially coplanar with the TFT semiconductive layer, and a capacitor a-Si layer substantially coplanar with the TFT a-Si layer.

US Patent:

6740884, May 25, 2004

Filed:

Apr 3, 2002

Appl. No.:

10/116469

Inventors:

Ji Ung Lee - Niskayuna NY
Douglas Albagli - Clifton Park NY
George Edward Possin - Niskayuna NY

Assignee:

General Electric Company - Schenectady NY

International Classification:

H01L 2100

US Classification:

25037008, 25037009, 257386

Abstract:

A radiation detector includes a top gate thin film transistor (TFT) including a source electrode, a drain electrode, a gate electrode, a first dielectric layer, and a second dielectric layer, wherein the second dielectric layer is extending over a surface of the first dielectric layer. The radiation detector also includes a capacitor that includes at least two electrodes and a dielectric layer. The capacitor dielectric layer is formed unitarily with the TFT second dielectric layer.

US Patent:

6777685, Aug 17, 2004

Filed:

Apr 3, 2002

Appl. No.:

10/116185

Inventors:

Ji Ung Lee - Niskayuna NY

Assignee:

General Electric Company - Schenectady NY

International Classification:

H01L 27146

US Classification:

25037009, 257291

Abstract:

A radiation detector includes a top-gate thin film transistor (TFT) including a source electrode, a drain electrode, and a gate electrode, and a diode electrically coupled to the source electrode.

US Patent:

6784434, Aug 31, 2004

Filed:

Jun 25, 2002

Appl. No.:

10/183904

Inventors:

William Andrew Hennessy - Rexford NY
Douglas Albagli - Clifton Park NY
Ji Ung Lee - Niskayuna NY

Assignee:

General Electric Company - Schenectady NY

International Classification:

G01T 124

US Classification:

25037014, 25037008, 438 57, 257428

Abstract:

A method for fabricating a radiation detector including at least one Thin Film Transistor (TFT) includes forming a low resistance data line strap unitary with a light block element on the TFT.

US Patent:

6890780, May 10, 2005

Filed:

Oct 10, 2003

Appl. No.:

10/683895

Inventors:

Ji Ung Lee - Niskayuna NY, US

Assignee:

General Electric Company - Niskayuna NY

International Classification:

H01L021/00
H01L029/12

US Classification:

438 23, 257 79, 257E3301, 977DIG 1

Abstract:

The present invention provides a method and associated structure for forming an electrostatically-doped carbon nanotube device. The method includes providing a carbon nanotube having a first end and a second end. The method also includes disposing a first metal contact directly adjacent to the first end of the carbon nanotube, wherein the first metal contact is electrically coupled to the first end of the carbon nanotube, and disposing a second metal contact directly adjacent to the second end of the carbon nanotube, wherein the second metal contact is electrically coupled to the second end of the carbon nanotube. The method further includes disposing a first metal electrode adjacent to and at a distance from the first end of the carbon nanotube, wherein the first metal electrode is capacitively coupled to the first end of the carbon nanotube, and disposing a second metal electrode adjacent to and at a distance from the second end of the carbon nanotube, wherein the second metal electrode is capacitively coupled to the second end of the carbon nanotube. The method still further includes selectively applying a first bias to the first metal electrode to electrostatically dope the first end of the carbon nanotube and selectively applying a second bias to the second metal electrode to electrostatically dope the second end of the carbon nanotube.

US Patent:

7239076, Jul 3, 2007

Filed:

Sep 25, 2003

Appl. No.:

10/670487

Inventors:

Ji Ung Lee - Niskayuna NY, US
Reed Roeder Corderman - Niskayuna NY, US
William Hullinger Huber - Scotia NY, US

Assignee:

General Electric Company - Niskayuna NY

International Classification:

H01J 1/62
H01J 1/304

US Classification:

313497, 313495, 313310, 313311, 313309, 445 24

Abstract:

A self-aligned gated field emission device and an associated method of fabrication are described. The device includes a substrate and a porous layer disposed adjacent to the surface of the substrate, wherein the porous layer defines a plurality of substantially cylindrical channels, each of the plurality of substantially cylindrical channels aligned substantially parallel to one another and substantially perpendicular to the surface of the substrate. The device also includes a plurality of substantially rod-shaped structures disposed within at least a portion of the plurality of substantially cylindrical channels defined by the porous layer and adjacent to the surface of the substrate, wherein a portion of each of the plurality of substantially rod-shaped structures protrudes above the surface of the porous layer. The device further includes a gate dielectric layer disposed on the surface of the porous layer, wherein the gate dielectric layer is disposed between the plurality of substantially rod-shaped structures. The device still further includes a conductive layer selectively disposed on the surface of the gate dielectric layer, wherein the conductive layer is selectively disposed between the plurality of substantially rod-shaped structures.

US Patent:

7326328, Feb 5, 2008

Filed:

Jul 19, 2005

Appl. No.:

11/185004

Inventors:

Heather Diane Hudspeth - Clifton Park NY, US
Ji Ung Lee - Niskayuna NY, US
Reed Roeder Corderman - Niskayuna NY, US
Anping Zhang - Niskayuna NY, US
Renee Bushey Rohling - Burnt Hills NY, US
Lauraine Denault - Nassau NY, US
Joleyn Eileen Balch - Clifton Park NY, US

Assignee:

General Electric Company - Niskayuna NY

International Classification:

C25D 5/02

US Classification:

205118, 313306, 427 77

Abstract:

The present invention relates to gated nanorod field emission devices, wherein such devices have relatively small emitter tip-to-gate distances, thereby providing a relatively high emitter tip density and low turn on voltage. Such methods employ a combination of traditional device processing techniques (lithography, etching, etc. ) with electrochemical deposition of nanorods. These methods are relatively simple, cost-effective, and efficient; and they provide field emission devices that are suitable for use in x-ray imaging applications, lighting applications, flat panel field emission display (FED) applications, etc.