Jian Zhong Yu

US Patent:

20120187460, Jul 26, 2012

Filed:

Jan 25, 2011

Appl. No.:

13/013081

Inventors:

Christian Lavoie - Ossining NY, US
Zhengwen Li - Danbury CT, US
Ahmet S. Ozcan - Pleasantville NY, US
Filippos Papadatos - Wappingers Falls NY, US
Chengwen Pei - Danbury CT, US
Jian Yu - Danbury CT, US

Assignee:

INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY

International Classification:

H01L 29/78
H01L 21/336

US Classification:

257288, 438293, 257E29271, 257E21425

Abstract:

A method of forming a semiconductor device is provided that includes forming a first metal semiconductor alloy on a semiconductor containing surface, forming a dielectric layer over the first metal semiconductor alloy, forming an opening in the dielectric layer to provide an exposed surface the first metal semiconductor alloy, and forming a second metal semiconductor alloy on the exposed surface of the first metal semiconductor alloy. In another embodiment, the method includes forming a gate structure on a channel region of a semiconductor substrate, forming a dielectric layer over at least a source region and a drain region, forming an opening in the dielectric layer to provide an exposed surface the semiconductor substrate, forming a first metal semiconductor alloy on the exposed surface of the semiconductor substrate, and forming a second metal semiconductor alloy on the first metal semiconductor alloy.

US Patent:

20130171795, Jul 4, 2013

Filed:

Feb 21, 2013

Appl. No.:

13/772954

Inventors:

International Business Machines Corporation - Armonk NY, US
Jeffrey B. Johnson - Essex Junction VT, US
Zhengwen Li - Danbury CT, US
Jian Yu - Danbury CT, US

Assignee:

INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY

International Classification:

H01L 21/768

US Classification:

438303

Abstract:

An electrical structure is provided that includes a dielectric layer present on a semiconductor substrate and a via opening present through the dielectric layer.An interconnect is present within the via opening. A metal semiconductor alloy contact is present in the semiconductor substrate. The metal semiconductor alloy contact has a perimeter defined by a convex curvature relative to a centerline of the via opening. The endpoints for the convex curvature that defines the metal semiconductor alloy contact are aligned to an interface between a sidewall of the via opening, a sidewall of the interconnect and an upper surface of the semiconductor substrate.

US Patent:

20130175641, Jul 11, 2013

Filed:

Feb 28, 2013

Appl. No.:

13/780877

Inventors:

International Business Machines Corporation - Armonk NY, US
Dechao Guo - Wappinger Falls NY, US
Randolph F. Knarr - Albany NY, US
Chengwen Pei - Danbury CT, US
Gan Wang - Fishkill NY, US
Yanfeng Wang - Fishkill NY, US
Keith Kwong Hon Wong - Wappingers Falls NY, US
Jian Yu - Danbury CT, US
Jun Yuan - San Diego CA, US

Assignee:

INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY

International Classification:

H01L 29/78

US Classification:

257410

Abstract:

In a replacement gate scheme, a continuous material layer is deposited on a bottom surface and a sidewall surface in a gate cavity. A vertical portion of the continuous material layer is removed to form a gate component of which a vertical portion does not extend to a top of the gate cavity. The gate component can be employed as a gate dielectric or a work function metal portion to form a gate structure that enhances performance of a replacement gate field effect transistor.

US Patent:

20140070293, Mar 13, 2014

Filed:

Nov 14, 2013

Appl. No.:

14/080291

Inventors:

Damon B. Farmer - White Plains NY, US
Michael P. Chudzik - Danbury CT, US
Chengwen Pei - Danbury CT, US
Keith Kwong Hon Wong - Wappingers Falls NY, US
Jian Yu - Danbury CT, US
Zhen Zhang - Sollentuna, SE

Assignee:

INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY

International Classification:

H01L 27/108

US Classification:

257301

Abstract:

A memory device, and a method of forming a memory device, is provided that includes a capacitor with a lower electrode of a metal semiconductor alloy. In one embodiment, the memory device includes a trench present in a semiconductor substrate including a semiconductor on insulating (SOI) layer on top of a buried dielectric layer, wherein the buried dielectric layer is on top of a base semiconductor layer. A capacitor is present in the trench, wherein the capacitor includes a lower electrode of a metal semiconductor alloy having an upper edge that is self-aligned to the upper surface of the base semiconductor layer, a high-k dielectric node layer, and an upper electrode of a metal. The memory device further includes a pass transistor in electrical communication with the capacitor.

US Patent:

20210087259, Mar 25, 2021

Filed:

Dec 20, 2018

Appl. No.:

16/770840

Inventors:

- New York NY, US
Yaoxing Huang - Brooklyn NY, US
Jian Yu - New Providence NJ, US

International Classification:

C07K 16/10
C07K 16/28
A61K 39/42
A61P 31/18

Abstract:

In various embodiments, the present invention relates generally to using bispecific antibodies in the prevention and treatment of HIV.

US Patent:

20180237505, Aug 23, 2018

Filed:

Dec 21, 2017

Appl. No.:

15/850832

Inventors:

- New York NY, US
Yaoxing Huang - Brooklyn NY, US
Jian Yu - New Providence NJ, US

International Classification:

C07K 16/10
C07K 16/28

Abstract:

In various embodiments, the present invention relates generally to using bispecific antibodies in the prevention and treatment of HIV.

US Patent:

20180179299, Jun 28, 2018

Filed:

Jun 2, 2016

Appl. No.:

15/579280

Inventors:

- New York NY, US
Jian YU - New York NY, US
Xin YAO - New York NY, US
Yaoxing HUANG - New York NY, US

International Classification:

C07K 16/46
C07K 16/10
A61P 31/18

Abstract:

Provided are tri-specific fusion antibodies created to target multiple epitopes of the Human Immunodeficiency Virus (HIV). The fusion antibodies provide improved potency and breadth against HIV as compared to monospecific and bispecific antibodies, and additionally provide a high barrier against viral resistance. Also disclosed are pharmaceutical formulations and therapeutic methods utilizing such fusion proteins.

US Patent:

20170247435, Aug 31, 2017

Filed:

Jan 25, 2017

Appl. No.:

15/414822

Inventors:

- New York NY, US
Yaoxing Huang - Brooklyn NY, US
Jian Yu - New Providence NJ, US

International Classification:

C07K 16/10
C07K 16/28

Abstract:

In various embodiments, the present invention relates generally to using bispecific antibodies in the prevention and treatment of HIV.