Jin Y Lee

US Patent:

6509622, Jan 21, 2003

Filed:

Aug 23, 2000

Appl. No.:

09/644639

Inventors:

Qing Ma - San Jose CA
Jin Lee - Palo Alto CA
Quan Tran - San Jose CA
Harry Fujimoto - Sunnyvale CA

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 27095

US Classification:

257483, 438132, 438215, 438601

Abstract:

An integrated circuit including a die having a circuit area and a plurality of guard rings. The circuit area includes active devices, passive devices, and interconnects connected to form an integrated circuit. The plurality of guard rings includes a plurality of stacked guard rings having substantially equal widths and encircling the circuit area. Alternatively, the plurality of guard rings includes metallization level guard rings interleaved with one or more via level guard rings. Each of the one or more via level guard rings includes one or more guard rings encircling the circuit area. Alternatively, the plurality of guard rings includes a plurality of concentric guard rings encircling the circuit area. Each of the plurality of guard rings is fabricated from a metal, such as aluminum, copper, or silver, or an alloy of aluminum, copper, or silver.

US Patent:

6537706, Mar 25, 2003

Filed:

Mar 14, 2000

Appl. No.:

09/525198

Inventors:

Qing Ma - San Jose CA
Jin Lee - Palo Alto CA
Jun Fei Zheng - Mountain View CA
Giang Dao - Fremont CA

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G03F 900

US Classification:

430 5, 430323, 430296, 430394, 378 35

Abstract:

A method for making a photolithographic mask. The method comprises forming a film on a substrate that deforms the substrate, and applying a deformation reducing agent to the substrate to reduce the amount of deformation that the film caused. In a preferred embodiment, the deformation reducing agent comprises one or more films, which are formed on one side of the substrate, that balance the substrate deformation effect of one or more films that are deposited on the other side of the substrate. The film or films that constitute the deformation reducing agent may be similar to, or different from, an absorption film and/or any other films deposited on the substrate or on the absorption film.

US Patent:

6737754, May 18, 2004

Filed:

Feb 5, 2001

Appl. No.:

09/777833

Inventors:

Qing Ma - San Jose CA
Jin Lee - Palo Alto CA
Chun Mu - Saratoga CA
Quat Vu - Santa Clara CA
Jian Li - Sunnyvale CA
Larry Mosley - Sunnyvale CA

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 2328

US Classification:

257796, 257707, 257712, 257713

Abstract:

A semiconductor device having a multilayer laminate that includes a thermally stable, flexible polymer film, a semiconductor die, a molding compound, and a heat dissipation member. The die has an active surface and an inactive surface, in which the active surface includes a plurality of contacts. The molding compound contacts both the laminate and the die, but does not contact the dies active or inactive surfaces. The heat dissipation member contacts the dies inactive surface.

US Patent:

6806708, Oct 19, 2004

Filed:

Jun 17, 2003

Appl. No.:

10/464296

Inventors:

Jin Hyung Lee - Menlo Park CA
John M. Pauly - Redwood City CA
Dwight G. Nishimura - Palo Alto CA

Assignee:

The Board of Trustees of the Leland Standford Junior University - Palo Alto CA

International Classification:

G01V 300

US Classification:

324307, 324309

Abstract:

Imaging time using PILS is reduced by using multiple coils with localized sensitivities with each coil having a separate demodulation channel thereby permitting parallel signal processing and image reconstruction. Images from the multiple coils are then combined to form an image with a larger field of view (FOV).

US Patent:

6852518, Feb 8, 2005

Filed:

Jun 13, 2000

Appl. No.:

09/593828

Inventors:

Steven D. Rosen - San Francisco CA, US
Jin Kyu Lee - Alameda CA, US
Stefan Hemmerich - Berkeley CA, US

Assignee:

The Regents of the University of California - Oakland CA
Syntex (U.S.A.) LLC - Palo Alto CA

International Classification:

C12N009/10
C12N015/00
C12N005/00
C12N001/20
C07H021/04

US Classification:

435193, 4353201, 435325, 4352523, 435 6, 536 232

Abstract:

Novel glycosylsulfotransferases (GST-4α, GST-4β, and GST-6) and polypeptides related thereto, as well as nucleic acid compositions encoding the same, are provided. The subject polypeptides and nucleic acid compositions find use in a variety of applications, including various diagnostic and therapeutic agent screening applications. Also provided are methods of inhibiting selectin mediated binding events and methods of treating disease conditions associated therewith, particularly by administering an inhibitor of at least one of GST-4α, GST-4β, and GST-6.

US Patent:

6876053, Apr 5, 2005

Filed:

Aug 13, 1999

Appl. No.:

09/374502

Inventors:

Qing Ma - San Jose CA, US
Jin Lee - Mountain View CA, US
Harry Fujimoto - Sunnyvale CA, US
Changhong Dai - San Jose CA, US
Travis Eiles - San Jose CA, US
Krishna Seshan - San Jose CA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L029/00
H01L029/76
H01L031/113
H01L031/119

US Classification:

257500, 257369, 257374, 257499, 257401, 257506

Abstract:

An apparatus and methods for modifying isolation structure configurations for MOS devices to either induce or reduce tensile and/or compressive stresses on an active area of the MOS devices. The isolation structure configurations according to the present invention include the use of low-modulus and high-modulus, dielectric materials, as well as, tensile stress-inducing and compressive stress-inducing, dielectric materials, and further includes altering the depth of the isolation structure and methods for modifying isolation structure configurations, such as trench depth and isolation materials used, to modify (i. e. , to either induce or reduce) tensile and/or compressive stresses on an active area of a semiconductor device.

US Patent:

7070971, Jul 4, 2006

Filed:

Oct 29, 2003

Appl. No.:

10/697828

Inventors:

Steven Rosen - San Francisco CA, US
Jin Kyu Lee - Alameda CA, US
Stefan Hemmerich - Berkeley CA, US

Assignee:

Syntex (U.S.A.), LLC - Palo Alto CA
The Regents of the University of California - Oakland CA

International Classification:

C12N 9/10
C12N 15/00
C12N 1/20
C07K 1/00
C12Q 1/68

US Classification:

435193, 530350, 4353201, 4352523, 435 6

Abstract:

Novel glycosylsulfotransferases (GST-4α, GST-4β, and GST-6) and polypeptides related thereto, as well as nucleic acid compositions encoding the same, are provided. The subject polypeptides and nucleic acid compositions find use in a variety of applications, including various diagnostic and therapeutic agent screening applications. Also provided are methods of inhibiting selectin mediated binding events and methods of treating disease conditions associated therewith, particularly by administering an inhibitor of at least one of GST-4α, GST-4β, and GST-6.

US Patent:

7277597, Oct 2, 2007

Filed:

Jun 17, 2003

Appl. No.:

10/464236

Inventors:

Jin Hyung Lee - Menlo Park CA, US
John M. Pauly - Redwood City CA, US
Dwight G. Nishimura - Palo Alto CA, US

Assignee:

The Board of Trustees of the Leland Stanford Junior University - Palo Alto CA

International Classification:

G06K 9/36

US Classification:

382280

Abstract:

A modified projection on convex sets (POCS) algorithm and method for partial k-space reconstruction using low resolution phase maps for scaling full sets of reconstructed k-space data. The algorithm can be used with partial k-space trajectories in which the trajectories share a common point such as the origin of k-space, including variable-density spiral trajectories, projection reconstruction trajectories with a semicircle region acquisition, and projection reconstruction trajectories with every other spike acquired.