John Urban Bond

US Patent:

6721896, Apr 13, 2004

Filed:

Mar 31, 2000

Appl. No.:

09/539362

Inventors:

John H. Bond - Plano TX
Ioan V. Teodorescu - Plano TX

Assignee:

Alcatel - Paris

International Classification:

G06F 104

US Classification:

713500, 370503

Abstract:

A system for generating a timing signal is disclosed. A processor generates a selection command. A clock receives a signal selected in response to the selection command and converts the selected signal to a timing signal. A framing module inserts a phase of the timing signal into a framed signal. A method for generating a timing signal for a telecommunication system is disclosed. A selection command is generated using a processor. A signal is selected in response to the selection command. The selected signal is converted to a timing signal using a clock. A phase of the timing signal is inserted into a framed signal using a framing module.

US Patent:

7079553, Jul 18, 2006

Filed:

Apr 15, 2002

Appl. No.:

10/122506

Inventors:

John H. Bond - Plano TX, US
James C. McKinley - Frisco TX, US

Assignee:

Alcatel - Paris

International Classification:

H04J 3/07

US Classification:

370506, 370518

Abstract:

A technique for embedding a first clock phase within a second signal is described. In one embodiment, the invention comprises a method of embedding a phase of a first signal within a second signal comprising the steps of monitoring a first signal for a frame event, responsive to detection of a frame event in the first clock signal, determining a position of the frame event relative to a current segment of a second signal, and embedding in the current segment of the second signal a value representative of the relative position of the detected frame event.

Address:

1205 Fox Run, Argyle, TX 76226

VIN:

5Y4AM11Y07A000630

Make:

N/A

Model:

N/A

Year:

2007