John M Dinwiddie

US Patent:

43097545, Jan 5, 1982

Filed:

Jul 30, 1979

Appl. No.:

6/062261

Inventors:

John M. Dinwiddie - Loxahatchee FL

Assignee:

International Business Machines Corp. - Armonk NY

International Classification:

G06F 300

US Classification:

364200

Abstract:

A data interface mechanism for interfacing bit-parallel data buses of different bit widths. This mechanism provides an automatic and efficient mechanism for converting data bytes into plural-byte data words and vice versa. The mechanism utilizes a plurality of random access (RAM) storage units located between the two data buses and an addressing structure wherein the higher order address bits are supplied to a chip select decoder to produce different chip select signals which are used to select different ones of the RAM units. For successive data transfers to or from the narrower data bus, storage addresses are used which produce different chip select signals which select the different RAM units one after the other in a sequence which repeats itself. Thus, successive data bytes to (from) the narrower bus are transferred from (to) the different RAM units in a rotating manner. For data transfers to or from the wider data bus, a storage address is used which produces a distinctive chip select signal which is different from those used for the individual narrower transfers.

US Patent:

52300412, Jul 20, 1993

Filed:

Dec 11, 1990

Appl. No.:

7/626791

Inventors:

John M. Dinwiddie - West Palm Beach FL
Bobby J. Freeman - Boynton Beach FL
Gustavo A. Suarez - Boca Raton FL
Bruce J. Wilkie - West Palm Beach FL

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1520

US Classification:

395162

Abstract:

An information handling apparatus for transferring and composing image signals for display including a bus interface circuit adapted to allow selective access to a bus of an independent image signal generated by an independent image source. The selective access enables composition of the independent image signal in response to control information; the composition enables real time display of a composed image signal.

US Patent:

54345928, Jul 18, 1995

Filed:

Sep 17, 1993

Appl. No.:

8/122819

Inventors:

John M. Dinwiddie - West Palm Beach FL
Bobby J. Freeman - Boynton Beach FL
Thomas J. Micallef - Boynton Beach FL
Gustavo A. Suarez - Boca Raton FL
Bruce J. Wilkie - West Palm Beach FL

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G09G 114

US Classification:

345133

Abstract:

A multimedia solution is presented which allows a multimedia architecture to be implemented on an existing computer system. According to the invention, an expansion unit which incorporates a multimedia architecture is provided. The expansion unit is connected to an existing computer system via an expansion slot of an I/O bus of the existing computer as well as via a display device output terminal of the computer. The expansion unit is also connected to a display device. Accordingly, the expansion unit controls the presentation which is provided on the display device.

US Patent:

53697499, Nov 29, 1994

Filed:

Apr 19, 1994

Appl. No.:

8/230433

Inventors:

Ernest D. Baker - Boca Raton FL
John M. Dinwiddie - West Palm Beach FL
Lonnie E. Grice - Boca Raton FL
James M. Joyce - Boca Raton FL
John M. Loffredo - Deerfield Beach FL
Kenneth R. Sanderson - West Palm Beach FL

Assignee:

IBM Corporation - Boca Raton FL

International Classification:

G06F 1300

US Classification:

395325

Abstract:

The functions of two virtual operating systems (e. g. , S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors access the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations.

US Patent:

44173040, Nov 22, 1983

Filed:

Nov 13, 1981

Appl. No.:

6/321132

Inventors:

John M. Dinwiddie - Loxahatchee FL

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 300

US Classification:

364200

Abstract:

A cycle steal mechanism for enabling a host processor to initiate and control the cycle stealing of data to or from a storage unit located in an I/O controller which is connected to the I/O channel bus of the host processor. The I/O controller also includes a microprocessor and a direct memory access (DMA) unit either or both of which can be used to control the transfer of data between the I/O controller storage unit and the host processor. Typically, the DMA unit is used for cycle stealing data between the controller storage unit and the host processor. The cycle steal mechanism of the present invention enables the host processor to also initiate and control the cycle stealing of data to or from the controller storage unit without interrupting the program running in the controller microprocessor and without interrupting the cycle stealing operations of the DMA unit. This new cycle steal mechanism is the reverse of the normal situation where it is the microprocessor or DMA unit that is controlling the cycle stealing. Since the I/O controller accommodates both kinds of cycle stealing, the present invention can be said to provide a "2-way" cycle stealing capability.

US Patent:

54345901, Jul 18, 1995

Filed:

Oct 14, 1993

Appl. No.:

8/136724

Inventors:

John M. Dinwiddie - West Palm Beach FL
Bobby J. Freeman - Boynton Beach FL
Gustavo A. Suarez - Boca Raton FL
Bruce J. Wilkie - West Palm Beach FL

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G09G 500

US Classification:

345115

Abstract:

An information handling apparatus for transferring and composing image signals including a plurality of media sources configured to provide a corresponding plurality of image signals, a media bus connected to the media sources, and a media control module coupled to the media bus. The media bus allows selective access for the plurality of image signals. The selective access enables composition of the independent image signals in response to control information. The media control module receives a composed image signal from the media bus and provides the composed image signal to a display device.

US Patent:

53882156, Feb 7, 1995

Filed:

Apr 28, 1994

Appl. No.:

8/234706

Inventors:

Ernest D. Baker - Boca Raton FL
John M. Dinwiddie - West Palm Beach FL
Lonnie E. Grice - Boca Raton FL
James M. Joyce - Boca Raton FL
John M. Loffredo - Deerfield Beach FL
Kenneth R. Sanderson - West Palm Beach FL

Assignee:

IBM Corporation - Boca Raton FL

International Classification:

G06F 1520

US Classification:

395200

Abstract:

The functions of two virtual operating systems (e. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors access the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations.

US Patent:

53634977, Nov 8, 1994

Filed:

Sep 30, 1993

Appl. No.:

8/128760

Inventors:

Ernest D. Baker - Boca Raton FL
John M. Dinwiddie - West Palm Beach FL
Lonnie E. Grice - Boca Raton FL
John M. Loffredo - Deerfield Beach FL
Kenneth R. Sanderson - West Palm Beach FL
Gustavo A. Suarez - Boca Raton FL

Assignee:

IBM Corporation - Boca Raton FL

International Classification:

G06F 1202

US Classification:

395425

Abstract:

The functions of two virtual operating systems (e. g. , S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated from 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques, The S/370 is limit checked prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors access the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 respective Operating Systems in a single system environment without significant rewriting of either operating system.