John D Macpherson

US Patent:

6348742, Feb 19, 2002

Filed:

Jan 25, 1999

Appl. No.:

09/236523

Inventors:

John MacPherson - Fremont CA

Assignee:

Clear Logic, Inc. - San Jose CA

International Classification:

H01L 2348

US Classification:

257786, 257784, 257659, 257503, 257783, 257787, 257692, 257 48, 257480, 257773, 324754, 324765, 3241581, 324 54, 324762, 324758

Abstract:

A bond pad structure is provided which has a primary bond pad region electrically connected to a secondary bond pad region. The secondary bond pad region is used to test a circuit for configuration, while the primary bond pad is covered with a protective oxide. After configuration and etching to complete desired disconnections, the oxide is removed from the primary bond pad region, leaving an undamaged surface for subsequent wire bonding. The primary bond pad region and the secondary bond pad region can be a unitary structure or two separate structures.

US Patent:

6369437, Apr 9, 2002

Filed:

Jan 12, 1999

Appl. No.:

09/229040

Inventors:

John MacPherson - Fremont CA
Alan H. Huggins - Gilroy CA
Richard J. Schmidley - San Jose CA

Assignee:

Clear Logic, Inc. - San Jose CA

International Classification:

H01L 2900

US Classification:

257529, 257665, 257209

Abstract:

A vertical fuse structure and methods for customization of integrated circuits include a substantially vertically-oriented interconnect structure or âfuseâ which provides for a more densely packed and thus smaller programmable integrated circuit. In a preferred embodiment, a vertical interconnect structure is fabricated by forming a first interconnect layer, forming an insulating layer over the first interconnect layer in which substantially vertically-oriented vias are patterned in contact with the first interconnect layer, filling the vias with a conductive plug, and forming a second interconnect layer over the insulating layer in contact with the conductive plug. The vertical interconnect structure is preferably disconnected by forming a narrow, substantially vertical disconnect cavity through the second interconnect layer and a portion of the conductive plug, thereby removing the connection between the second interconnect layer and the plug.

US Patent:

6486527, Nov 26, 2002

Filed:

Jun 25, 1999

Appl. No.:

09/344613

Inventors:

John MacPherson - Fremont CA 94538
Jayaraman Iyer - San Jose CA 95136
Alan H. Huggins - Gilroy CA 95020
John S. Starzynski - Salinas CA 93906
Keith R. Erb - Watsonville CA 95076

International Classification:

H01L 2900

US Classification:

257529, 257530, 257758

Abstract:

According to the present invention, after manufacture of a disconnect fuse circuit, windows are opened in the insulating film overlying the second interconnect layer at all possible disconnection points, the disconnection points preferably being an exposure window that is aligned over a disconnect fuse circuit that includes a via that electrically connects electrical conductors disposed on different respective layers. This insulating film may consist of one or more layers of one or more materials, but preferentially consists of a single layer of silicon oxide. The wafer is then stored for later configuration. When the wafer is to be configured, a non-precision mask is manufactured. The wafer is coated with photoresist and patterned using the mask to produce disconnection holes in the photoresist at the desired disconnection points. Since the area over the desired disconnection points are free of the insulating film overlying the second patterned interconnect layer, the etching process can be limited to etch techniques which are optimized to etch metal with selectivity to the insulating film. The areas at the disconnection sites that are covered by the insulating film are further protected during the etch process, since the insulating film acts as an etch barrier to inhibit the etching of active circuit elements in proximity to the desired disconnect points.

US Patent:

8543339, Sep 24, 2013

Filed:

Dec 4, 2009

Appl. No.:

12/592950

Inventors:

Anne Wojcicki - Palo Alto CA, US
Linda Avey - Lafayette CA, US
Joanna Louise Mountain - Menlo Park CA, US
John Michael Macpherson - Palo Alto CA, US
Joyce Yeh-hong Tung - Menlo Park CA, US

Assignee:

23andMe, Inc. - Mountain View CA

International Classification:

G06F 7/00

US Classification:

702 19, 702 20, 703 13, 707700

Abstract:

Gamete donor selection includes receiving a specification including a phenotype of interest, receiving a genotype of a recipient and a plurality of genotypes of a respective plurality of donors, determining statistical information pertaining to the phenotype of interest based at least in part on different pairings of the genotype of the recipient and a genotype of a donor in the plurality of donors, and identifying a preferred donor among the plurality of donors, based at least in part on the statistical information determined.

US Patent:

20010000210, Apr 12, 2001

Filed:

Dec 6, 2000

Appl. No.:

09/732218

Inventors:

John MacPherson - Fremont CA, US
Wendy Eng - San Jose CA, US

International Classification:

H01L023/495
H01L021/44
H01L021/48
H01L021/50

US Classification:

257/666000, 438/125000

Abstract:

A structure and method are provided to allow a die to be packaged more uniformly and in parallel with a package by utilizing a lead frame having at least one cavity within the lead frame, thereby allowing excess die-attach epoxy can flow into the cavity or cavities and reducing the amount of contact surface area between the die and lead frame.

US Patent:

20010023118, Sep 20, 2001

Filed:

May 23, 2001

Appl. No.:

09/863577

Inventors:

John MacPherson - Fremont CA, US
Ron Thomas - Salinas CA, US
Alan Huggins - Gilroy CA, US

International Classification:

H01L021/20

US Classification:

438/584000

Abstract:

An unprogrammed die is attached to a die package, and bond wires are attached between the die and lead fingers on the die package. A cavity in the die package allows the die to be configured, such as with a laser. The die is then tested and, if needed, etched to ensure the desired configuration. The die package is sealed, such as with a filler material or a lid to protect the configured die and bond wires. In one embodiment, the die and bond wires are fully exposed through the cavity. In another embodiment, only a minority portion of the bona wires are exposed through the cavity. The cavity can be formed either prior to or after attaching the die and bond wires to the die package.

US Patent:

20020100958, Aug 1, 2002

Filed:

Jan 28, 2002

Appl. No.:

10/058363

Inventors:

John MacPherson - Fremont CA, US
Alan Huggins - Gilroy CA, US
Richard Schmidley - San Jose CA, US

Assignee:

CLEAR LOGIC, INC.

International Classification:

H01L021/82
H01L029/00

US Classification:

257/529000, 438/132000

Abstract:

A vertical fuse structure and methods for customization of integrated circuits include a substantially vertically-oriented interconnect structure or “fuse” which provides for a more densely packed and thus smaller programmable integrated circuit. In a preferred embodiment, a vertical interconnect structure is fabricated by forming a first interconnect layer, forming an insulating layer over the first interconnect layer in which substantially vertically-oriented vias are patterned in contact with the first interconnect layer, filling the vias with a conductive plug, and forming a second interconnect layer over the insulating layer in contact with the conductive plug. The vertical interconnect structure is preferably disconnected by forming a narrow, substantially vertical disconnect cavity through the second interconnect layer and a portion of the conductive plug, thereby removing the connection between the second interconnect layer and the plug.

US Patent:

20130345988, Dec 26, 2013

Filed:

Jul 1, 2013

Appl. No.:

13/932513

Inventors:

Andro Rene Hsu - Berkeley CA, US
Oleksiy Khomenko - Stanford CA, US
John Michael Macpherson - Mountain View CA, US
Joanna Louise Mountain - Menlo Park CA, US
Brian Thomas Naughton - Mountain View CA, US
Serge Saxonov - San Mateo CA, US
Anne Wojcicki - Palo Alto CA, US
Alexander Wong - Palo Alto CA, US

Assignee:

23andMe, Inc. - Mountain View CA

International Classification:

G06F 19/18
G06F 19/24

US Classification:

702 19

Abstract:

Summarizing an aggregate contribution to a phenotypic characteristic for an individual includes: receiving information pertaining to the phenotypic characteristic of an individual; identifying, using one or more computer processors, a set of one or more markers associated with the phenotypic characteristic; obtaining a set of one or more marker measurements of the individual that corresponds to the set of one or more markers; obtaining a set of one or more statistical factors that measure associations between the set of one or more markers and the phenotypic characteristic; determining an aggregate contribution to the phenotypic characteristic of the individual based at least in part on the retrieved set of one or more statistical factors; and outputting a display characteristic to be displayed that is associated with the aggregate contribution to the phenotypic characteristic for the individual.