John E Owens

Address:

19622 Wetherwind, Katy, TX 77449

VIN:

3FAHP06Z37R119374

Make:

FORD

Model:

FUSION

Year:

2007

US Patent:

7044322, May 16, 2006

Filed:

Dec 16, 2002

Appl. No.:

10/320093

Inventors:

John E. Owens - Cypress TX, US
Roger J. Orner - Columbia SC, US
Terry A. Gallagher - Wheaton IL, US

Assignee:

Chicago Bridge & Iron Company - Plainfield IL

International Classification:

B65D 88/46

US Classification:

220224, 220222

Abstract:

A low-profile secondary seal for floating-roof storage tanks has a tip seal that includes a series of segmental adapter plates connected to the shoe plates. A tip seal element is mounted on the adapter plates. A fabric extends between the tip seal and the floating roof. A pusher is hinged to the floating roof, and includes a pusher bar with two ends that are disposed in a sliding arrangement against the adapter plates. A spring is connected to the pusher at an inclined angle, providing a mechanical advantage as the spring biases the pusher and pusher bar outwardly against the plates, pressing the tip seal against the tank shell.

US Patent:

7748555, Jul 6, 2010

Filed:

Jul 12, 2004

Appl. No.:

10/889404

Inventors:

John E. Owens - Cypress TX, US
Terry A. Gallagher - Wheaton IL, US

Assignee:

Chicago Bridge & Iron Company - Plainfield IL

International Classification:

B65D 88/46

US Classification:

220224, 220216

Abstract:

A low-profile secondary seal for floating-roof storage tanks has a tip seal that is mounted on a series of segmental adapter plates connected to the shoe plates. A fabric extends between the tip seal and the floating roof. A spring presses the tip seal against the tank shell.

US Patent:

7818539, Oct 19, 2010

Filed:

Aug 28, 2006

Appl. No.:

11/511157

Inventors:

Scott Rixner - Spring TX, US
John D. Owens - Emeryville CA, US
Ujval J. Kapasi - Santa Clara CA, US
William J. Dally - Stanford CA, US

Assignee:

The Board of Trustees of the Leland Stanford Junior University - Palo Alto CA
The Massachusetts Institute of Technology - Cambridge MA

International Classification:

G06F 15/00
G06F 15/76

US Classification:

712 20, 712 4, 712 8, 712 22, 712222

Abstract:

A processor implements conditional vector operations in which, for example, an input vector containing multiple operands to be used in conditional operations is divided into two or more output vectors based on a condition vector. Each output vector can then be processed at full processor efficiency without cycles wasted due to branch latency. Data to be processed are divided into two groups based on whether or not they satisfy a given condition by e. g. , steering each to one of the two index vectors. Once the data have been segregated in this way, subsequent processing can be performed without conditional operations, processor cycles wasted due to branch latency, incorrect speculation or execution of unnecessary instructions due to predication. Other examples of conditional operations include combining one or more input vectors into a single output vector based on a condition vector, conditional vector switching, conditional vector combining, and conditional vector load balancing.