John J Rapp

US Patent:

7670961, Mar 2, 2010

Filed:

Jun 8, 2005

Appl. No.:

11/629058

Inventors:

Harbans Singh Sachdev - Hopewell Junction NY, US
Howard Shillingford - Poughkeepsie NY, US
Garkay Joseph Leung - Wappingers Falls NY, US
John Rapp - Poughkeepsie NY, US

Assignee:

NXP B.V. - Eindhoven

International Classification:

H01L 21/31
H01L 21/469

US Classification:

438763, 438782, 257E21487, 257E2158

Abstract:

The present invention relates to a process that minimizes the cracking of low-k dielectric polymers. In an example embodiment, on a semiconductor substrate (200), there is a method of forming a composite dielectric disposed on a metal layer passivated with plasma deposited silicon oxide SiOx. The method comprises depositing a first layer of a first predetermined thickness of a spin-on dielectric on the metal layer protected with a plasma deposited silicon oxide SiO. Next a thin stress relief layer of a second predetermined thickness is disposed on the first layer of spin-on-dielectric. Upon the thin stress-relief layer, a second layer of a third predetermined thickness of spin-on dielectric is deposited. Low-k spin-on dielectrics may include hydrogen silsequioxane (HSQ) and methyl silsequioxane (MSQ).