John William Rapp

US Patent:

7230881, Jun 12, 2007

Filed:

Apr 20, 2005

Appl. No.:

11/109091

Inventors:

Robert J. Howard - Clifton VA, US
Thomas E. Digan - Manassas VA, US
John W. Rapp - Manassas VA, US

Assignee:

Lockheed Martin Corporation - Bethesda MD

International Classification:

H04B 11/00

US Classification:

367131, 367134

Abstract:

A platform with a sensor is for coupling to a submarine or other underwater vehicle and for sending data about the seascape to the submarine. In an embodiment, the platform is coupled to the submarine via a cable that has communication lines in it. The sensor may be attached to the platform via a mast. In an embodiment, the platform has a control surface, an anti-collision sensor, and a ballast. The platform allows a submarine to survey the seascape before rising to periscope depth.

US Patent:

7373432, May 13, 2008

Filed:

Oct 9, 2003

Appl. No.:

10/684057

Inventors:

John W. Rapp - Manassas VA, US
Larry Jackson - Manassas VA, US
Mark Jones - Centreville VA, US
Troy Cherasaro - Culpeper VA, US

Assignee:

Lockheed Martin - Manassas VA

International Classification:

G06F 3/00
G06F 15/76
H03K 19/00

US Classification:

710 8, 712 10, 712 37, 716 16, 716 17

Abstract:

A programmable circuit receives configuration data from an external source, stores the firmware in a memory, and then downloads the firmware from the memory. Such a programmable circuit allows a system, such as a computing machine, to modify the programmable circuit's configuration, thus eliminating the need for manually reprogramming the configuration memory. For example, if the programmable circuit is an FPGA that is part of a pipeline accelerator, a processor coupled to the accelerator can modify the configuration of the FPGA. More specifically, the processor retrieves from a configuration registry firmware that represents the modified configuration, and sends the firmware to the FPGA, which then stores the firmware in a memory such as an electrically erasable and programmable read-only memory (EEPROM). Next, the FPGA downloads the firmware from the memory into its configuration registers, and thus reconfigures itself to have the modified configuration.

US Patent:

7386704, Jun 10, 2008

Filed:

Oct 9, 2003

Appl. No.:

10/683932

Inventors:

Kenneth R. Schulz - Manassas VA, US
John W. Rapp - Manassas VA, US
Larry Jackson - Manassas VA, US
Mark Jones - Centreville VA, US
Troy Cherasaro - Culpeper VA, US

Assignee:

Lockheed Martin Corporation - Bethesda MD

International Classification:

G06F 9/38

US Classification:

712 15, 712 34

Abstract:

A pipeline accelerator includes a bus and a plurality of pipeline units, each unit coupled to the bus and including at least one respective hardwired-pipeline circuit. By including a plurality of pipeline units in the pipeline accelerator, one can increase the accelerator's data-processing performance as compared to a single-pipeline-unit accelerator. Furthermore, by designing the pipeline units so that they communicate via a common bus, one can alter the number of pipeline units, and thus alter the configuration and functionality of the accelerator, by merely coupling or uncoupling pipeline units to or from the bus. This eliminates the need to design or redesign the pipeline-unit interfaces each time one alters one of the pipeline units or alters the number of pipeline units within the accelerator.

US Patent:

7418574, Aug 26, 2008

Filed:

Oct 9, 2003

Appl. No.:

10/684102

Inventors:

Chandan Mathur - Manassas VA, US
Scott Hellenbach - Amissville VA, US
John W. Rapp - Manassas VA, US
Larry Jackson - Manassas VA, US
Mark Jones - Centreville VA, US
Troy Cherasaro - Culpeper VA, US

Assignee:

Lockheed Martin Corporation - Manassas VA

International Classification:

G06F 15/76

US Classification:

712 15, 712 2, 712 34

Abstract:

A peer-vector machine includes a host processor and a hardwired pipeline accelerator. The host processor executes a program, and, in response to the program, generates host data, and the pipeline accelerator generates pipeline data from the host data. Alternatively, the pipeline accelerator generates the pipeline data, and the host processor generates the host data from the pipeline data. Because the peer-vector machine includes both a processor and a pipeline accelerator, it can often process data more efficiently than a machine that includes only processors or only accelerators. For example, one can design the peer-vector machine so that the host processor performs decision-making and non-mathematically intensive operations and the accelerator performs non-decision-making and mathematically intensive operations. By shifting the mathematically intensive operations to the accelerator, the peer-vector machine often can, for a given clock frequency, process data at a speed that surpasses the speed at which a processor-only machine can process the data.

US Patent:

7487302, Feb 3, 2009

Filed:

Oct 3, 2005

Appl. No.:

11/243527

Inventors:

Brent I. Gouldey - Aldie VA, US
Joel J. Fuster - Manassas VA, US
John Rapp - Manassas VA, US
Mark Jones - Centreville VA, US

Assignee:

Lockheed Martin Corporation - Bethesda MD

International Classification:

G06F 12/00

US Classification:

711154, 711100, 711156, 711167, 711168, 711169, 712 2, 712 15, 712 20, 712 34

Abstract:

A memory subsystem includes a memory controller operable to generate first control signals according to a standard interface. A memory interface adapter is coupled to the memory controller and is operable responsive to the first control signals to develop second control signals adapted to be applied to a memory subsystem to access desired storage locations within the memory subsystem.

US Patent:

7619541, Nov 17, 2009

Filed:

Oct 3, 2005

Appl. No.:

11/243528

Inventors:

Kenneth R. Schulz - Manassas VA, US
Andrew Hamm - Herndon VA, US
John Rapp - Manassas VA, US

Assignee:

Lockheed Martin Corporation - Bethesda MD

International Classification:

G01V 3/00

US Classification:

3408551, 34087007, 36518905, 712 2

Abstract:

A sensor assembly includes a sensor operable to sense a physical parameter and generate an electrical signal responsive to the sensed physical parameter. Local processing circuitry is physically positioned proximate the sensor and is electrically coupled to the sensor. The local processing circuitry includes an output port adapted to be coupled to a communications channel and the local processing circuitry is operable to process data from the sensor to generate processed sensor data and to provide the processed data on the output port.

US Patent:

7676649, Mar 9, 2010

Filed:

Oct 3, 2005

Appl. No.:

11/243507

Inventors:

John Rapp - Manassas VA, US
Chandan Mathur - Manassas VA, US
Scott Hellenbach - Amissville VA, US
Mark Jones - Centreville VA, US
Joseph A. Capizzi - Sterling VA, US

Assignee:

Lockheed Martin Corporation - Bethesda MD

International Classification:

G06F 15/76
G06F 11/00
G06F 11/16
G06F 9/00

US Classification:

712 43, 712228, 714 6, 714 10, 714 11

Abstract:

According to an embodiment of the invention, a computing machine comprises a pipeline accelerator, a host processor coupled to the pipeline accelerator, and a redundant processor, a redundant pipeline unit, or both, coupled to the host processor and to the pipeline accelerator. The computing machine may also include a system-restore server and a system-restore bus that allow the machine to periodically save the machine states in case of a failure. Such a computing machine has a fault-tolerant scheme that is often more flexible than conventional schemes. For example, if the pipeline accelerator has more extra “space” than the host processor, then one can add to the computing machine one or more redundant pipeline units that can provide redundancy to both the pipeline and the host processor. Therefore, the computing machine can include redundancy for the host processor even though it has no redundant processing units.

US Patent:

7681352, Mar 23, 2010

Filed:

Jun 30, 2008

Appl. No.:

12/165060

Inventors:

Jyun-Horng Fu - Centreville VA, US
Robert James Howard - Clifton VA, US
Antonio Paulic - Arlington VA, US
John W. Rapp - Manassas VA, US

Assignee:

Lockheed Martin Corporation - Bethesda MD

International Classification:

F41C 9/06
F41A 35/00
F41A 35/02

US Classification:

42 114, 89 31

Abstract:

An apparatus and method for sealing the barrel of an underwater gun between firings is disclosed. The apparatus comprises a valve that is moved between a sealing and non-sealing state by a valve-actuator. In some embodiments, the valve actuator is driven by gases that result when a round is fired.

Address:

1006 Kimberly Pl, Great Falls, VA 22066

Phone:

(703)4043277

VIN:

4T1BK36B47U211178

Make:

TOYOTA

Model:

AVALON

Year:

2007

Address:

1006 Kimberly Pl, Great Falls, VA 22066

Phone:

(703)4043277

VIN:

WBANB53517CN93619

Make:

BMW

Model:

5 SERIES

Year:

2007