John Shelby Worley

US Patent:

7313668, Dec 25, 2007

Filed:

Jan 29, 2004

Appl. No.:

10/768306

Inventors:

John S. Worley - Fort Collins CO, US

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

G06F 12/00

US Classification:

711207, 711154, 711217

Abstract:

Various embodiments of the present invention provide for immediate allocation of virtual memory on behalf of processes running within a computer system. One or more bit flags within each translation indicate whether or not a corresponding virtual memory page is immediate. READ access to immediate virtual memory is satisfied by hardware-supplied or software-supplied values. WRITE access to immediate virtual memory raises an exception to allow an operating system to allocate physical memory for storing values written to the immediate virtual memory by the WRITE access.

US Patent:

7376974, May 20, 2008

Filed:

Nov 21, 2002

Appl. No.:

10/303690

Inventors:

Graeme John Proudler - Gifford, GB
Boris Balacheff - Keynsham, GB
John S. Worley - Fort Collins CO, US
Chris D. Hyser - Fort Collins CO, US

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

G06F 7/04
H04L 9/00

US Classification:

726 27, 713164

Abstract:

A computer apparatus for creating a trusted environment comprising a trusted device arranged to acquire a first integrity metric to allow determination as to whether the computer apparatus is operating in a trusted manner; a processor arranged to allow execution of a first trust routine and associated first operating environment, and means for restricting the first operating environment access to resources available to the trust routine, wherein the trust routine being arranged to acquire the first integrity metric and a second integrity metric to allow determination as to whether the first operating environment is operating in a trusted manner.

US Patent:

7784063, Aug 24, 2010

Filed:

Jun 14, 2004

Appl. No.:

10/867048

Inventors:

John Worley - Fort Collins CO, US
Daniel J. Magenheimer - Fort Collins CO, US
Chris D. Hyser - Victor NY, US
Robert D. Gardner - Fort Collins CO, US
Thomas W. Christian - Fort Collins CO, US
Bret McKee - Fort Collins CO, US
Christopher Worley - Fort Collins CO, US

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

G06F 9/44
H04L 29/06

US Classification:

719319, 713166, 713167

Abstract:

In various embodiments of the present invention, execution-state transitions occur in a first portion of a system, and a cumulative execution state for each process is maintained by a second portion of the system so that, when a second-portion routine is called, the second-portion routine can determine whether or not the current execution state is suitable for execution of the second-portion routine. In various embodiments, a callpoint log, allocated and maintained for each process, stores the cumulative execution state for the process. In one embodiment, the first portion is an operating system, and the second portion is a secure kernel, with the cumulative execution state used by the secure kernel to prevent unauthorized access by erroneously or maliciously invoked operating-system routines to secure kernel routines. In another embodiment, the cumulative execution state is used as a debugging tool by the second-portion routines to catch errors in the implementation of the first-portion routines.

US Patent:

8176179, May 8, 2012

Filed:

Apr 3, 2007

Appl. No.:

11/732710

Inventors:

John S. Worley - Fort Collins CO, US
Hugh Mahon - Fort Collins CO, US

Assignee:

Secure64 Software Corporation - Greenwood Village CO

International Classification:

G06F 15/173
G06F 3/00

US Classification:

709226, 710 54

Abstract:

Embodiments of the present invention are directed to computationally efficient methods and systems for managing connection-associated and exchange-associated resources within network proxies. In one embodiment of the present invention, a circular connection-switch queue is employed for allocating, de-allocating, and maintaining connection-based or exchange-based data resources within a proxy. The connection-switch queue includes a free pointer that identifies a next connection-switch queue entry for allocation, and an idle pointer that is incremented continuously or at fixed intervals as timers associated with connection-switch entries expire. In an alternate embodiment, the connection-switch queue includes a free pointer, an idle pointer, and a clear pointer.

US Patent:

8464265, Jun 11, 2013

Filed:

Apr 3, 2006

Appl. No.:

11/397918

Inventors:

John S. Worley - Fort Collins CO, US

Assignee:

Secure64 Software - Greenwood Village CO

International Classification:

G06F 9/46

US Classification:

718104

Abstract:

Various embodiments of the present invention are directed to an efficient and flexible method and system for managing a pool of computational resources that can be allocated from a resource pool, used for varying periods of time, and eventually returned to the resource pool. Certain embodiments of the present invention are directed to a method and system for efficiently managing ephemeral ports used for short-duration communications connections. In one embodiment of the present invention, an array of port tables is employed to store and manage a large space of ephemeral protocol ports. Each port table is a circular buffer, each entry of which includes a port number that uniquely identifies a communications port, a sequence number that allows the port to be immediately reallocated, and any other additional protocol-specific information that may be associated with the port. A non-local-port-number portion of a connection address, comprising a remote IP address, a remote port number, and a local IP address, may be hashed to generate a numerical reference to a particular port table within the array, or list, of port tables, and ephemeral ports for the non-local-port-number portion of a connection address are allocated from, and deallocated and returned to, the numerically identified port table.

US Patent:

20020194389, Dec 19, 2002

Filed:

Apr 8, 2002

Appl. No.:

10/118646

Inventors:

William Worley - Centennial CO, US
John Worley - Fort Collins CO, US
Daniel Magenheimer - Fort Collins CO, US
Chris Hyser - Fort Collins CO, US
Tom Christian - Fort Collins CO, US
Bret McKee - Fort Collins CO, US
Robert Gardner - Fort Collins CO, US

International Classification:

G06F009/00
G06F009/54
G06F015/163

US Classification:

709/310000, 709/102000

Abstract:

A combined-hardware-and-software secure-platform interface to which operating systems and customized control programs interface within a computer system. The combined-hardware-and-software secure-platform interface employs a hardware platform that provides at least four privilege levels, non-privileged instructions, non-privileged registers, privileged instructions, privileged registers, and firmware interfaces. The combined-hardware-and-software secure-platform interface conceals all privileged instructions, privileged registers, and firmware interfaces and privileged registers from direct access by operating systems and custom control programs, providing to the operating systems and custom control programs the non-privileged instructions and non-privileged registers provided by the hardware platform as well as a set of callable software services. The callable services provide a set of secure-platform management services for operational control of hardware resources that neither exposes privileged instructions, privileged registers, nor firmware interfaces of the hardware nor simulates privileged instructions and privileged registers. The callable services also provide a set of security-management services that employ internally generated secret data, each compartmentalized security-management service managing internal secret data without exposing the internal secret data to computational entities other than the security-management service itself.

US Patent:

20040024729, Feb 5, 2004

Filed:

Jul 30, 2002

Appl. No.:

10/209374

Inventors:

John Worley - Fort Collins CO, US

International Classification:

G06F007/00

US Classification:

707/001000

Abstract:

One embodiment of the present invention provides a hierarchical data structure for storing sparse data that can be traversed from root node to data-level node without incurring translation-cache misses. By contrast with currently used hierarchical data structures, the family of hierarchical data structures that represent one embodiment of the present invention employs non-data-level nodes that contain virtual-memory translations rather than memory references. The family of hierarchical data structures that represent one embodiment of the present invention are traversed from root node through successive layers of non-data-level nodes to data-level nodes in a manner similar to traversal of currently used hierarchical data structures. However, in the family of hierarchical data structures that represent one embodiment of the present invention, the address of a next-lower-level node is computed from a base address of the next-lowest level, and the computed address is furnished, along with the virtual-memory translation stored in a higher-level node, in order to access the next-lower-level node.

US Patent:

20050055394, Mar 10, 2005

Filed:

Sep 10, 2003

Appl. No.:

10/659837

Inventors:

John Worley - Fort Collins CO, US

International Classification:

G06F007/38

US Classification:

708523000

Abstract:

A method and system for execution of high performance, multiple-precision multiply-and-add operations that take advantage of native multiply-and-add instruction of modem processors. A careful choice of instruction ordering leads to highly parallelizable groups of instructions, the instructions in each group independent of the results generated by other instructions of the group.