Jonathan C Knight

US Patent:

8583037, Nov 12, 2013

Filed:

Mar 10, 2011

Appl. No.:

13/045493

Inventors:

Amer Atrash - Richardson TX, US
Jonathan Knight - Richardson TX, US
Ross Teggatz - McKinney TX, US
Michael Sullivan - Richardson TX, US
Andrew Blaszczak - Richardson TX, US

Assignee:

Triune IP LLC - Richardson TX

International Classification:

H04B 5/00

US Classification:

455 411, 455 412, 455 73

Abstract:

Data transmission systems and methods are disclosed in which a transmitter and a receiver, each having an inductor, are configured for wirelessly transferring data and power between them. Error detection is implemented for implementing error correction techniques by making corrections at the receiver, at the transmitter, or both. In preferred embodiments of the invention, error correction approaches include oversampling, power adjustments, and frequency adjustments. In preferred implementations, the systems and methods are used for transmitting both power and data using a single pair of inductors.

US Patent:

56752415, Oct 7, 1997

Filed:

Jun 27, 1996

Appl. No.:

8/672125

Inventors:

Ross E. Teggatz - McKinney TX
Joseph A. Devore - Dallas TX
Jonathan R. Knight - Dallas TX

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G05F 156
G05F 500

US Classification:

323282

Abstract:

A circuit and method for providing a low drop out voltage regulator. A source follower circuit is provided having a transistor (MD1) with an output terminal for driving a load at its source terminal and a voltage supply coupled to the drain terminal. At least one diode (D1) is coupled between the gate terminal and a ground reference to provide a predetermined voltage at the gate of the transistor (MD1). A voltage multiplier circuit is provided having an input (IN) for receiving an oscillating input voltage and a charge storage device (39) coupled between the oscillating input and a voltage reference (Vref), and being further coupled in series with the voltage reference and then to the gate terminal of the transistor (MD1). The oscillating input voltage is used to charge the charge storage device (39) to a voltage approximately equal to the voltage reference. When the supply voltage falls below the normal level, the series combination of the voltage reference and the charge storage device provides a multiplied voltage at the gate of the transistor, for example a voltage of twice the reference voltage.