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Joseph K Fauty

age ~74

from Garden City, NY

Also known as:
  • Joseph Kaiser Fauty
  • Joseph Ttee Fauty
  • Joseph Tr Fauty
  • Joseph F Fauty
  • Joseph Fauty Rev Li
  • Joseph Fauty Revocable Li
  • Joseph Fauly

Joseph Fauty Phones & Addresses

  • Garden City, NY
  • Prescott, AZ
  • 4661 Decatur St, Mesa, AZ 85205
  • Pinedale, AZ
  • Maricopa, AZ
Name / Title
Company / Classification
Phones & Addresses
Joseph K Fauty
Manager
MODEL STRUCTURES FOR MODEL RAILROADS, LLC
Business Services at Non-Commercial Site · Nonclassifiable Establishments
4661 E Decatur St, Mesa, AZ 85205
4689 Sharp Shooter Way, Prescott, AZ 86301

Us Patents

  • Semiconductor Device And Laminated Leadframe Package

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  • US Patent:
    6768186, Jul 27, 2004
  • Filed:
    Oct 15, 2002
  • Appl. No.:
    10/270401
  • Inventors:
    Joseph K. Fauty - Mesa AZ
    Jay Allen Yoder - Glendale AZ
  • Assignee:
    Semiconductor Components Industries, L.L.C. - Phoenix AZ
  • International Classification:
    H01L 23495
  • US Classification:
    257666, 257783, 257775, 257787, 257781, 257784
  • Abstract:
    An semiconductor device ( ) comprising a first semiconductor die ( ) and a leadframe ( ). The leadframe includes a first laminate ( ) having a bottom surface formed with a lead ( ) of the semiconductor device, a second laminate ( ) overlying the first laminate for mounting the semiconductor die, and an adhesive tape ( ) for attaching the first and second laminates.
  • Method Of Forming A Semiconductor Package And Leadframe Therefor

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  • US Patent:
    7109064, Sep 19, 2006
  • Filed:
    Dec 8, 2003
  • Appl. No.:
    10/729892
  • Inventors:
    Joseph K. Fauty - Mesa AZ, US
    James Howard Knapp - Gilbert AZ, US
  • Assignee:
    Semiconductor Components Industries, L.L.C. - Phoenix AZ
  • International Classification:
    H01L 21/44
    H01L 21/48
    H01L 21/50
  • US Classification:
    438123, 438124
  • Abstract:
    A method of forming a leadframe and a semiconductor package using the leadframe facilitates selectively forming leads for the package. The leadframe is formed with a first portion of the leads extending from a panel of the leadframe into a molding cavity section of the leadframe. After encapsultaion, a portion of the leadframe panel is used to form a second portion of the leads that is external to the package body.
  • Multi-Chip Semiconductor Connector Assembly Method

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  • US Patent:
    7202105, Apr 10, 2007
  • Filed:
    Jun 28, 2004
  • Appl. No.:
    10/877165
  • Inventors:
    Francis J. Carney - Gilbert AZ, US
    Phillip Celaya - Gilbert AZ, US
    Joseph K. Fauty - Mesa AZ, US
    James P. Letterman - Mesa AZ, US
    Stephen St. Germain - Scottsdale AZ, US
    Jay A. Yoder - Phoenix AZ, US
  • Assignee:
    Semiconductor Components Industries, L.L.C. - Phoenix AZ
  • International Classification:
    H01L 23/495
  • US Classification:
    438107, 257E23042
  • Abstract:
    In one exemplary embodiment, a multi-chip connector is formed to have a first conductive strip that is attached to a first semiconductor die and a second conductive strip that is attached to a second semiconductor die.
  • Multi-Chip Semiconductor Connector And Method

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  • US Patent:
    7202106, Apr 10, 2007
  • Filed:
    Jun 28, 2004
  • Appl. No.:
    10/877327
  • Inventors:
    Francis J. Carney - Gilbert AZ, US
    Phillip Celaya - Gilbert AZ, US
    Joseph K. Fauty - Mesa AZ, US
    James P. Letterman - Mesa AZ, US
    Stephen St. Germain - Scottsdale AZ, US
    Jay A. Yoder - Phoenix AZ, US
  • Assignee:
    Semiconductor Components Industries, L.L.C. - Phoenix AZ
  • International Classification:
    H01L 21/44
    H01L 21/50
  • US Classification:
    438107, 438121, 257E21499
  • Abstract:
    In one exemplary embodiment, a multi-chip connector is formed to have a first conductive strip that is suitable for attaching to a first semiconductor die and a second conductive strip that is attached suitable for attaching to a second semiconductor die.
  • Multi-Chip Semiconductor Connector Assemblies

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  • US Patent:
    7298034, Nov 20, 2007
  • Filed:
    Jun 28, 2004
  • Appl. No.:
    10/877325
  • Inventors:
    Francis J. Carney - Gilbert AZ, US
    Phillip Celaya - Gilbert AZ, US
    Joseph K. Fauty - Mesa AZ, US
    James P. Letterman - Mesa AZ, US
    Stephen St. Germain - Scottsdale AZ, US
    Jay A. Yoder - Phoenix AZ, US
  • Assignee:
    Semiconductor Components Industries, L.L.C. - Phoenix AZ
  • International Classification:
    H01L 23/02
  • US Classification:
    257686, 257E25018, 257676, 257685, 257777, 438108, 438109, 361760
  • Abstract:
    In one exemplary embodiment, a multi-chip semiconductor connector is utilized for forming a semiconductor package having a plurality of semiconductor die. The multi-chip semiconductor connector is utilized to mechanically attach the plurality of semiconductor die together and to provide electrical connection to the plurality of semiconductor die.
  • Encapsulated Chip Scale Package Having Flip-Chip On Lead Frame Structure And Method

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  • US Patent:
    7439100, Oct 21, 2008
  • Filed:
    Aug 18, 2005
  • Appl. No.:
    11/205464
  • Inventors:
    Joseph K. Fauty - Mesa AZ, US
    Denise Thienpont - Scottsdale AZ, US
  • Assignee:
    Semiconductor Components Industries, L.L.C. - Phoenix AZ
  • International Classification:
    H01L 21/00
  • US Classification:
    438123, 438108
  • Abstract:
    In one embodiment, an encapsulated electronic package includes a semiconductor chip having patterned solderable pads formed on a major surface. During an assembly process, the patterned solderable pads are directly affixed to conductive leads. The assembly is encapsulated using, for example, a MAP over-molding process, and then placed through a separation process to provide individual chip scale packages having flip-chip on lead frame interconnects.
  • Multi-Chip Semiconductor Connector Assembly Method

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  • US Patent:
    7498195, Mar 3, 2009
  • Filed:
    Feb 12, 2007
  • Appl. No.:
    11/673942
  • Inventors:
    Francis J. Carney - Gilbert AZ, US
    Phillip Celaya - Gilbert AZ, US
    Joseph K. Fauty - Mesa AZ, US
    James P. Letterman - Mesa AZ, US
    Stephen St. Germain - Scottsdale AZ, US
    Jay A. Yoder - Phoenix AZ, US
  • Assignee:
    Semiconductor Components Industries, L.L.C. - Phoenix AZ
  • International Classification:
    H01L 21/00
  • US Classification:
    438107, 438111, 257E21615
  • Abstract:
    In one exemplary embodiment, a multi-chip connector is formed to have a first conductive strip that is attached to a first semiconductor die and a second conductive strip that is attached to a second semiconductor die.
  • Multi-Chip Semiconductor Connector Assemblies

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  • US Patent:
    7508060, Mar 24, 2009
  • Filed:
    Sep 24, 2007
  • Appl. No.:
    11/860379
  • Inventors:
    Francis J. Carney - Gilbert AZ, US
    Phillip Celaya - Gilbert AZ, US
    Joseph K. Fauty - Mesa AZ, US
    James P. Letterman - Mesa AZ, US
    Stephen St. Germain - Scottsdale AZ, US
    Jay A. Yoder - Phoenix AZ, US
  • Assignee:
    Semiconductor Components Industries, L.L.C. - Phoenix AZ
  • International Classification:
    H01L 23/52
  • US Classification:
    257686
  • Abstract:
    In one exemplary embodiment, a multi-chip semiconductor connector is utilized for forming a semiconductor package having a plurality of semiconductor die. The multi-chip semiconductor connector is utilized to mechanically attach the plurality of semiconductor die together and to provide electrical connection to the plurality of semiconductor die.

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