Joseph Khristian Han

US Patent:

7354849, Apr 8, 2008

Filed:

Feb 28, 2006

Appl. No.:

11/365082

Inventors:

John J. Plombon - Portland OR, US
Adrien R. Lavoie - Beaverton OR, US
Juan E. Dominguez - Hillsboro OR, US
Joseph H. Han - San Jose CA, US
Harsono S. Simka - Saratoga CA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 21/44

US Classification:

438597, 438643, 438687, 257E2101, 427 96

Abstract:

A method for carrying out a damascene process to form an interconnect comprises providing a semiconductor substrate having a trench etched into a dielectric layer, wherein the trench includes a barrier layer and an adhesion layer, depositing a copper seed layer onto the adhesion layer using an ALD process, depositing an iodine catalyst layer onto the copper seed layer using an ALD process, and depositing a copper layer onto the copper seed layer using an ALD process. The iodine catalyst layer causes the copper layer to fill the trench by way of a bottom-up fill mechanism. The trench fill is performed using a single ALD process, which minimizes the creation of voids and seams in the final copper interconnect.

US Patent:

7682891, Mar 23, 2010

Filed:

Dec 28, 2006

Appl. No.:

11/647893

Inventors:

Adrien R. Lavoie - Beaverton OR, US
Valery M. Dubin - Portland OR, US
John J. Plombon - Portland OR, US
Juan E. Dominguez - Hillsboro OR, US
Harsono S. Simka - Saratoga CA, US
Joseph H. Han - San Jose CA, US
Mark Doczy - Beaverton OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 29/78

US Classification:

438199, 257E29255, 257E29264

Abstract:

Described herein are metal gate electrode stacks including a low resistance metal cap in contact with a metal carbonitride diffusion barrier layer, wherein the metal carbonitride diffusion barrier layer is tuned to a particular work function to also serve as a work function metal for a pMOS transistor. In an embodiment, the work function-tuned metal carbonitride diffusion barrier prohibits a low resistance metal cap layer of the gate electrode stack from migrating into the MOS junction. In a further embodiment of the present invention, the work function of the metal carbonitride barrier film is modulated to be p-type with a pre-selected work function by altering a nitrogen concentration in the film.

US Patent:

7749906, Jul 6, 2010

Filed:

Feb 22, 2006

Appl. No.:

11/359060

Inventors:

Juan E. Dominguez - Hillsboro OR, US
Adrien R. Lavoie - Beaverton OR, US
John J. Plombon - Portland OR, US
Joseph H. Han - San Jose CA, US
Harsono S. Simka - Saratoga CA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 21/44

US Classification:

438687, 257E21006

Abstract:

Incompatible materials, such as copper and nitrided barrier layers, may be adhered more effectively to one another. In one embodiment, a precursor of copper is deposited on the nitrided barrier. The precursor is then converted, through the application of energy, to copper which could not have been as effectively adhered to the barrier in the first place.

US Patent:

7851360, Dec 14, 2010

Filed:

Feb 14, 2007

Appl. No.:

11/675066

Inventors:

Juan Dominguez - Hillsboro OR, US
Adrien Lavoie - Beaverton OR, US
John Plombon - Portland OR, US
Joseph Han - San Jose CA, US
Harsono Simka - Saratoga CA, US
David Thompson - Tonawanda NY, US
John Peck - Tonawanda NY, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 21/44

US Classification:

438681, 438648, 438650, 438653, 438654, 257E21171, 257E21476

Abstract:

Organometallic precursors and methods for deposition on a substrate in seed/barrier applications are herein disclosed. In some embodiments, the organometallic precursor is a ruthenium-containing, tantalum-containing precursor or combination thereof and may be deposited by atomic layer deposition, chemical vapor deposition and/or physical vapor deposition.

US Patent:

7858525, Dec 28, 2010

Filed:

Mar 30, 2007

Appl. No.:

11/694677

Inventors:

Juan E. Dominguez - Hillsboro OR, US
Adrien R. Lavoie - Beaverton OR, US
John J. Plombon - Portland OR, US
Joseph H. Han - San Jose CA, US
Harsono S. Simka - Saratoga CA, US
Bryan C. Hendrix - Danbury CT, US
Gregory T. Stauf - New Milford CT, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 21/44

US Classification:

438687, 438784, 438758, 438771, 438783, 438628, 438618, 438760, 438643, 438685, 438686, 438694, 438696, 438707, 438763

Abstract:

A method including introducing a fluorine-free organometallic precursor in the presence of a substrate; and forming a conductive layer including a moiety of the organometallic precursor on the substrate according to an atomic layer or chemical vapor deposition process. A method including forming an opening through a dielectric layer to a contact point; introducing a fluorine-free copper film precursor and a co-reactant; and forming a copper-containing seed layer in the opening. A system including a computer including a microprocessor electrically coupled to a printed circuit board, the microprocessor including conductive interconnect structures formed from fluorine-free organometallic precursor.

US Patent:

7982204, Jul 19, 2011

Filed:

May 27, 2010

Appl. No.:

12/788603

Inventors:

Juan E. Dominguez - Hillsboro OR, US
Adrien R. Lavoie - Beaverton OR, US
John J. Plombon - Portland OR, US
Joseph H. Han - San Jose CA, US
Harsono S. Simka - Saratoga CA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 29/06

US Classification:

257 9, 257 43, 257E29245, 257E23161, 977762

Abstract:

Incompatible materials, such as copper and nitrided barrier layers, may be adhered more effectively to one another. In one embodiment, a precursor of copper is deposited on the nitrided barrier. The precursor is then converted, through the application of energy, to copper which could not have been as effectively adhered to the barrier in the first place.

US Patent:

8319287, Nov 27, 2012

Filed:

Feb 12, 2010

Appl. No.:

12/705248

Inventors:

Adrien R. Lavoie - Beaverton OR, US
Valery M. Dubin - Portland OR, US
John J. Plombon - Portland OR, US
Juan E. Dominguez - Hillsboro OR, US
Harsono S. Simka - Saratoga CA, US
Joseph H. Han - San Jose CA, US
Mark Doczy - Beaverton OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 29/78

US Classification:

257369, 257E29255, 438199

Abstract:

Described herein are metal gate electrode stacks including a low resistance metal cap in contact with a metal carbonitride diffusion barrier layer, wherein the metal carbonitride diffusion barrier layer is tuned to a particular work function to also serve as a work function metal for a pMOS transistor. In an embodiment, the work function-tuned metal carbonitride diffusion barrier prohibits a low resistance metal cap layer of the gate electrode stack from migrating into the MOS junction. In a further embodiment of the present invention, the work function of the metal carbonitride barrier film is modulated to be p-type with a pre-selected work function by altering a nitrogen concentration in the film.

US Patent:

8344352, Jan 1, 2013

Filed:

Jul 18, 2011

Appl. No.:

13/185094

Inventors:

Juan E. Dominguez - Hillsboro OR, US
Adrien R. Lavoie - Beaverton OR, US
John J. Plombon - Portland OR, US
Joseph H. Han - San Jose CA, US
Harsono S. Simka - Saratoga CA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 29/06

US Classification:

257 9, 257 43, 257E29245, 257E23161, 977762

Abstract:

Incompatible materials, such as copper and nitrided barrier layers, may be adhered more effectively to one another. In one embodiment, a precursor of copper is deposited on the nitrided barrier. The precursor is then converted, through the application of energy, to copper which could not have been as effectively adhered to the barrier in the first place.