Joseph H Moran

US Patent:

6703596, Mar 9, 2004

Filed:

Nov 13, 2001

Appl. No.:

09/986926

Inventors:

Joseph E. Moran - Morgan Hill CA

Assignee:

Lockheed Martin Corporation - Bethesda MD

International Classification:

H01L 2700

US Classification:

2502081, 2502031

Abstract:

An apparatus and system for imaging radio frequency electromagnetic signals that is useful for imaging a target object in order to identify an unknown object or to determine the condition or configuration of a known object. One embodiment of an apparatus for imaging radio frequency electromagnetic signals comprises an optical source operable to output an unmodulated optical signal; an image sensor operable to receive the unmodulated optical signal and an incident radio frequency electromagnetic signal and to modulate the unmodulated optical signal with the received radio frequency electromagnetic signal so as to form a modulated optical signal; a lens operable to receive the modulated optical signal and to focus the modulated optical signal; and a photodetector operable to receive the focused modulated optical signal and output an electrical signal representing the focused modulated optical signal. The optical source may be a laser.

US Patent:

20110303185, Dec 15, 2011

Filed:

Jun 9, 2011

Appl. No.:

13/157132

Inventors:

John Zajac - San Jose CA, US
Joseph Moran - Los Altos CA, US

International Classification:

F02B 19/14

US Classification:

123275

Abstract:

Split cycle engine and method in which output power and power density are increased in some embodiments with a turbocharger or supercharger which increases the pressure in the compression cylinder and also increases the power output of the engine without a corresponding decrease in the efficiency of the engine (work done per unit fuel). In other embodiments, the engine is used for braking, and the energy produced by braking is stored pneumatically and then used in driving the compressor.

US Patent:

58453253, Dec 1, 1998

Filed:

Apr 13, 1993

Appl. No.:

8/046476

Inventors:

William Van Loo - Palo Alto CA
John Watkins - Sunnyvale CA
Robert Garner - San Jose CA
William Joy - Palo Alto CA
Joseph Moran - Santa Clara CA
William Shannon - Los Altos CA
Ray Cheng - Cupertino CA

Assignee:

Sun Microsystems, Inc. - Mountain View CA

International Classification:

G06F 1516
G06F 1208

US Classification:

711135

Abstract:

Hardware and software improvements in workstations which utilize virtual addressing in multi-user operating systems with write back caches, including operating systems which allow each user to have multiple active processes. In virtual addressing, multi-user workstations, system performance may be improved significantly by including a virtual address write back cache as one of the system elements. Data protection and the reassignment of virtual addresses are supported within such a system as well. Multiple active processes, each with its own virtual address space, and an operating system shared by those processes in a manner which is invisible to user programs. Cache "Flush" logic is used to remove selected blocks from the virtual cache when virtual addresses are to be reassigned.

US Patent:

55198538, May 21, 1996

Filed:

Apr 29, 1994

Appl. No.:

8/235755

Inventors:

Joseph P. Moran - Santa Clara CA
Russel P. Sandberg - San Francisco CA
Donald C. Coleman - Piedmont CA

Assignee:

Legato Systems, Inc. - Palo Alto CA

International Classification:

G06F 1310
G06F 1314

US Classification:

395550

Abstract:

An acceleration device for enhancing the speed of synchronous writes in a computer system includes a novel control subsystem, in one embodiment a device driver, and stable storage having an access time on the same order of magnitude as the access time of the main memory in the computer system. In one embodiment, the novel device driver is interposed in the operating system of the computer between the proprietary kernel and one or more peripheral storage unit device drivers. The novel device driver intercepts I/O commands, for example, synchronous write commands, from the operating system that are intended for one of the peripheral storage unit device drivers and subsequently copies the data specified in the write command from main memory of the computer to the stable storage of the acceleration device. The stable storage is operated as a cache and upon one of a set of predetermined conditions being satisfied, selected data stored in the stable storage are transferred, i. e. , flushed to the appropriate peripheral storage device using the device driver for that storage device.

US Patent:

53597133, Oct 25, 1994

Filed:

Mar 11, 1993

Appl. No.:

8/051048

Inventors:

Joseph P. Moran - Santa Clara CA
Russel P. Sandberg - San Francisco CA
Donald C. Coleman - Piedmont CA

Assignee:

Legato Systems, Inc. - Pala Alto CA

International Classification:

G06F 1310

US Classification:

395200

Abstract:

An acceleration device for enhancing the speed of synchronous writes in a computer system includes a novel control means, in one embodiment a device driver, and stable storage having an access time on the same order of magnitude as the access time of the main memory in the computer system. In one embodiment, the novel device driver is interposed in the operating system of the computer between the proprietary kernel and one or more peripheral storage unit device drivers. The novel device driver intercepts I/O commands, for example, synchronous write commands, from the operating system that are intended for one of the peripheral storage unit device drivers and subsequently copies the data specified in the write command from main memory of the computer to the stable storage of the acceleration device. The stable storage is operated as a cache and upon one of a set of predetermined conditions being satisfied, selected data stored in the stable storage are transferred, i. e. , flushed to the appropriate peripheral storage device using the device driver for that storage device.

US Patent:

51192900, Jun 2, 1992

Filed:

Jul 16, 1990

Appl. No.:

7/554186

Inventors:

William V. Loo - Palo Alto CA
John Watkins - Sunnyvale CA
Joseph Moran - Santa Clara CA
William Shannon - Los Altos CA
Ray Cheng - Cupertino CA

Assignee:

Sun Microsystems, Inc. - Mountain View CA

International Classification:

G06F 1208

US Classification:

395400

Abstract:

Improvements in workstations which utilizes virtual addressing in multi-user operating systems with write back caches, including operating systems which allow each user to have multiple active processes directed to the support of alias addresses, i. e. , two or more virtual addresses which map to the same physical address in real memory Specifically, alias addresses are created so that their low order address bits are identical, modulo the size of the cache (as a minimum) for user programs which use alias addresses generated by the kernel, or wholely within the kernel. For alias addresses in the operating system, rather than user programs, which cannot be made to match in their low order address bits, their pages are assigned as "Don't Cache" pages in the memory management unit (MMU) employed by workstations which utilize virtual addressing.