Joseph E Wright

US Patent:

20220334181, Oct 20, 2022

Filed:

Apr 19, 2021

Appl. No.:

17/301936

Inventors:

- Austin TX, US
Anurag Jindal - Austin TX, US
Joseph Rollin Wright - Round Rock TX, US
Nipun Mahajan - Pitampura, IN
Shruti Singla - Samana, IN
Hemant Nautiyal - Greater Noida, IN

International Classification:

G01R 31/317
G01R 31/3193
G01R 31/3185

Abstract:

A control system, that includes a primary controller and various auxiliary controllers, is configured to facilitate a built-in self-test (BIST) of a system-on-chip (SoC). The primary controller is configured to initiate a BIST sequence associated with the SoC. Based on the BIST sequence initiation, each auxiliary controller is configured to schedule execution of various self-test operations on various functional circuits, various memories, and various logic circuits of the SoC by various functional BIST controllers, various memory BIST controllers, and various logic BIST controllers of the SoC, respectively. Based on the execution of the self-test operations, each auxiliary controller further generates various status bits with each status bit indicating whether at least one functional circuit, at least one memory, or at least one logic circuit is faulty. Based on the status bits generated by each auxiliary controller, a fault diagnosis of the SoC is initiated.

US Patent:

20200284830, Sep 10, 2020

Filed:

Mar 5, 2019

Appl. No.:

16/292654

Inventors:

- Austin TX, US
Srikanth JAGANNATHAN - Austin TX, US
Thomas Henry LUEDEKE - Oberbergkirchen, DE
Venkannababu AMBATI - Austin TX, US
Mark Shelton CINQUE - Austin TX, US
Joseph Rollin WRIGHT - Round Rock TX, US

International Classification:

G01R 31/28

Abstract:

An integrated circuit includes a plurality of external terminal circuits, each having an external terminal. The integrated circuit includes a wakeup detector including a plurality of inputs. Each input of the plurality of inputs is coupled to an external terminal circuit. The wakeup detector generates an output signal indicative of an external terminal of the plurality of external terminal circuits being placed at a wakeup voltage. The integrated circuit includes a trigger generation circuit having a plurality of outputs in which each output is coupled to an external terminal circuit to generate a wake-up voltage at an external terminal of the external terminal circuit by coupling the external terminal to a power supply terminal of the integrated circuit to generate an indication of the external terminal being at the wakeup voltage at the wakeup detector when at least a portion of the integrated circuit is in a low power mode.

US Patent:

20170344419, Nov 30, 2017

Filed:

May 27, 2016

Appl. No.:

15/167601

Inventors:

- Redwood City CA, US
Joseph R. Wright - Round Rock TX, US
John R. Feehrer - Westford MA, US

International Classification:

G06F 11/07

Abstract:

A switched fabric hierarchy (e.g., a PCIe hierarchy) may utilize hardware, firmware, and/or software for filtering duplicative or otherwise undesirable correctable error messages from reaching a root complex. An operating system of the root complex may detect a persistent stream or storm of correctable errors from a particular endpoint and activate filtering of correctable errors from that endpoint. A filtering device may receive filtering commands and parameters from the operating system, implement the filtering, and monitor further correctable errors from the offending device. While an offending device is being filtered, correctable error messages from the offending device may be masked from the operating system, while correctable error messages from other devices in the switched fabric hierarchy may be transmitted. At such time as the filtering device may detect that conditions for ending filtering of a device are met, the filtering device may cease filtering of the offending device and return monitoring responsibilities to the operating system.

US Patent:

20170295098, Oct 12, 2017

Filed:

Apr 7, 2016

Appl. No.:

15/093681

Inventors:

- Redwood City CA, US
Joseph Wright - Round Rock TX, US

International Classification:

H04L 12/801
H04L 12/26

Abstract:

A firmware controller of a node of a distributed system determines a self-regulation threshold for at least one metric associated with traffic transmitted via an interconnect. The threshold is set to a value lower than the maximum permitted by the interconnect protocol. The controller transmits a request to an application-layer traffic endpoint to limit traffic based on the threshold. A hardware congestion management unit collects measurements on traffic metrics, including at least one metric other than the one for which the threshold is defined. Based on measurements obtained from the hardware congestion management unit, the controller modifies the self-regulation threshold and notifies the application-layer endpoint.

US Patent:

20170070363, Mar 9, 2017

Filed:

Sep 8, 2015

Appl. No.:

14/848233

Inventors:

- Redwood City CA, US
Joseph R. Wright - Round Rock TX, US

International Classification:

H04L 12/423
H04L 12/823
H04L 12/933
H04L 12/861
H04L 12/801
H04L 29/06
H04L 12/879

Abstract:

A system that includes a PCIe hierarchy may utilize a ring controller for message handling. Nodes acting as the root complex or as endpoint devices may include such ring controllers, portions of which may be implemented by dedicated circuitry on each node. The ring controllers may receive posted transactions representing messages, may return flow control credits for those transactions, may classify each message as to its type, and may write information about each message to a respective ring buffer storing information about messages of that type. A processor (or processing logic/circuitry) on the node may subsequently retrieve messages from the ring buffers and process them. The sizes and locations of the ring buffers in memory may be configurable by software (e.g., by writing to registers within the ring controllers). The message types may include correctable and non-correctable error messages, and non-error messages (including, but not limited to, vendor-defined messages).