Joshua William Caldwell

US Patent:

6969982, Nov 29, 2005

Filed:

Oct 3, 2003

Appl. No.:

10/678534

Inventors:

Joshua William Caldwell - Tucson AZ, US

Assignee:

National Semiconductor Corporation - Santa Clara CA

International Classification:

G05F003/16

US Classification:

323313, 323273, 323315

Abstract:

A circuit having a voltage regulated by a reference current. The circuit includes a current feedback loop and a reference current source that is capable of producing a reference current. The current feedback loop includes an output device, a voltage to current converter, and a current feedback element. The voltage to current converter is coupled to the output device. A node of the voltage to current converter is the regulated voltage. The current feedback element is coupled to the voltage to current converter to provide a feedback current from the voltage to current converter to compare with the reference current to produce an error signal that is input to a control terminal of the output device. Thus, the current feedback loop regulates the voltage at the node of the voltage to current converter.

US Patent:

6977491, Dec 20, 2005

Filed:

Oct 6, 2003

Appl. No.:

10/680500

Inventors:

Joshua William Caldwell - Tucson AZ, US
Steven Ashley Martinez - Tucson AZ, US

Assignee:

National Semiconductor Corporation - Santa Clara CA

International Classification:

G05F001/40

US Classification:

323282

Abstract:

A current limiting circuit. The current limiting circuit includes a device coupled to an output node of the current limiting circuit. The device is responsive to magnitude of a signal at the output node. Moreover, the device has a first mode and a second mode, depending on the magnitude of the signal. The current limiting circuit also has a regulation component that regulates a voltage at the output node when the device is in the first mode. The current limiting circuit also has an element having a current that limits current at the output node when the device is in the second mode.

US Patent:

7170352, Jan 30, 2007

Filed:

May 4, 2005

Appl. No.:

11/121785

Inventors:

Joshua William Caldwell - Tucson AZ, US

Assignee:

National Semiconductor Corporation - Santa Clara CA

International Classification:

H03F 3/45

US Classification:

330261, 323273, 323274

Abstract:

A circuit for driving a capacitive load is provided. The circuit includes a differential signal sensor and a differential amplifier. The differential amplifier is arranged to drive the capacitive load. Further, the differential amplifier is arranged to receive an output voltage at one input, and to receive a reference voltage at another input. The output voltage is provided at the output of the differential amplifier. Also, the differential amplifier is arranged to receive a bias current. The differential signal sensor is arranged to determine whether the difference between the output voltage and the reference voltage is within a voltage window. If the difference between the output voltage and the reference voltage is inside of the voltage window, the bias current is provided at its normal value. However, if the difference between the output voltage and the reference voltage is outside of the voltage window, the bias current is increased so that the bias current linearly increases with respect to time.

US Patent:

8120335, Feb 21, 2012

Filed:

Mar 27, 2009

Appl. No.:

12/413247

Inventors:

Joshua William Caldwell - Santa Clara CA, US

Assignee:

Linear Technology Corporation - Milpitas CA

International Classification:

G05F 1/613

US Classification:

323224, 323283

Abstract:

An average current mode switching converter is described for providing a regulated output current independent of load conditions, and a regulated output voltage as a function of the load connected to the converter. The converter includes an inductor, a modulator, a feedback loop, and a precharger. The modulator is configured to provide a regulated current through the inductor The feed back loop is coupled between the inductor and the modulator for regulating the current through the inductor. The precharger is configured and arranged so as to provide and maintain a preset minimum current through the inductor independent of the load so as to improve the recovery time of the converter from a step in the desired regulated output current. Also disclosed is a method of providing a regulated output current independent of load conditions at the output of an average current mode switching converter, and a regulated output voltage as a function of the load connected to the output of converter. The method includes the steps of providing a regulated current through an inductor; and regulating the current through the inductor independent of the load so that a minimum current flows through the inductor so as to improve the recovery time of the converter from a step in the desired regulated output current.

US Patent:

20100264890, Oct 21, 2010

Filed:

Jul 24, 2009

Appl. No.:

12/508670

Inventors:

Joshua W. Caldwell - San Jose CA, US

Assignee:

Linear Technology Corporation - Milpitas CA

International Classification:

G05F 1/10

US Classification:

323282

Abstract:

A device and method of providing any one of a plurality of desired levels of a regulated signal output to a load is described, wherein each desired level is a function of a corresponding reference signal. The device is configured and the method is designed to (1) store each desired level of the regulated signal output on a switchable storage device; and (2) selectively switch the correct storage device to the output when switching from one regulated state to another so as to establish the desired level of regulated signal output.

US Patent:

6879194, Apr 12, 2005

Filed:

Aug 25, 2003

Appl. No.:

10/648530

Inventors:

Joshua William Caldwell - Tucson AZ, US

Assignee:

National Semiconductor Corporation - Santa Clara CA

International Classification:

H03L007/00

US Classification:

327143

Abstract:

An active power-on reset (POR) current comparator circuit creates a POR signal for resetting logic devices and masking reference startup signals during the initial power supply ramp of an integrated circuit. The comparator circuit provides a logic level signal (i. e. , the POR signal) that will actuate when a bias current is above a predetermined level as compared to another current. The predetermined level for the bias current is set by a ratio established between two resistance levels within the active POR current comparator circuit.

US Patent:

20150145439, May 28, 2015

Filed:

Apr 29, 2014

Appl. No.:

14/264518

Inventors:

- Milpitas CA, US
Joshua W. Caldwell - Los Gatos CA, US
Bryan Legates - Los Altos CA, US

Assignee:

Linear Technology Corporation - Milpitas CA

International Classification:

H05B 33/08

US Classification:

315307

Abstract:

In a method for controlling a current regulator for dimming an LED load, a dimming signal has a duty cycle that controls the LED ON-time and LED OFF time at a fixed frequency. The regulator is controlled by the dimming signal to only supply current to the LED load during the LED ON-time. The regulator includes an inductor. The inductor current at the end of an ON-time is detected and its value is stored. During the OFF-time, the inductor is pre-charged to the current level matching the stored value, while the regulator's feedback loop is frozen during the OFF-time to not change its feedback control signal. Upon the next ON-time, the regulator begins supplying current to the LED load with the pre-charged inductor current, so there is no initial decrease in the delivered LED current. Therefore, the current pulse magnitudes are constant even with very low duty cycles.