Julian Valdez

US Patent:

20130247019, Sep 19, 2013

Filed:

Mar 19, 2012

Appl. No.:

13/424149

Inventors:

Lan Xu - Shanghai, CN
Tianming Liang - Shanghai, CN
Lei Song - Shanghai, CN
Newton G. Petersen - Austin TX, US
Dustyn Blasig - Austin TX, US
Julian G. Valdez - Austin TX, US
Nan Yang - Shanghai, CN
Hojin Kee - Austin TX, US

International Classification:

G06F 9/44

US Classification:

717168, 717174

Abstract:

System and method for managing and specifying hardware implementation of a graphical program. A graphical program that implements an algorithm is stored in a memory of a computer system. The graphical program meets one or more first specified implementation requirements and is targeted for deployment to a programmable hardware element. A plurality of sets of descriptive directives are also stored in the memory, where the descriptive directives are associated with the graphical program and specify one or more additional specified implementation requirements, e.g., memory resource implementations, optimization directives, and so forth, where the additional directives result from programmatic and/or user-specification. Each set of descriptive directives is useable by a synthesis tool to generate a respective hardware configuration program for deployment to the graphical programmable hardware element.

US Patent:

20140344614, Nov 20, 2014

Filed:

Dec 16, 2013

Appl. No.:

14/107476

Inventors:

- Austin TX, US
Newton G. Petersen - Austin TX, US
Matthew E. Novacek - Austin TX, US
Julian G. Valdez - Austin TX, US

Assignee:

NATIONAL INSTRUMENTS CORPORATION - Austin TX

International Classification:

G06F 1/06

US Classification:

713501

Abstract:

System and method for specifying and implementing relative hardware clocking in a high level programming language. User input specifying a program may be received. The program is specified for deployment to a programmable hardware element (PHE), and includes first and second code portions configured to communicate with each other during execution. The user input may further specify a rational ratio of respective execution rates for the first and second code portions. A hardware configuration program (HCP) implementing the specified program is automatically generated, including automatically determining a respective clock rate for at least one of the first and second code portions based on the rational ratio. The HCP may be deployable to the PHE, including implementing first and second clocks for controlling execution of the first and second code portions in accordance with the rational ratio and the automatically determined respective clock rate for the at least one code portion.