Lalitkumar Nathawad - Costa Mesa CA, US Justin Hwang - Mountain View CA, US
Assignee:
Atheros Communications, Inc. - Santa Clara CA
International Classification:
H03L 7/00
US Classification:
331 16, 331 17, 331167, 331117 R, 331177 R
Abstract:
A voltage-controlled oscillator (VCO) comprising a first circuit, a second circuit, a comparator circuit, and a control unit. The first circuit can determine an output common mode voltage associated with an output of the VCO. The second circuit can generate an upper control voltage limit and a lower control voltage limit associated with a control voltage received by the VCO based, at least in part, on the output common mode voltage. The comparator circuit can compare the control voltage to the upper and lower control voltage limits. The control unit can determine whether to change a switched capacitance associated with the VCO based, at least in part, on whether the control voltage is outside the upper and lower control voltage limits, thereby maintaining an optimal region of operation for the control voltage.
Electrostatic discharge (ESD) can affect the operation of and even damage an unprotected integrated circuit. Conventional ESD protection circuits may not be able to protect the integrated circuit if the voltage at the output of the integrated circuit swings with large amplitude. In some embodiments, an ESD protection circuit comprising switching circuitry that provides a low AC impedance path to ground can prevent improper triggering of the ESD protection circuit during normal operation of the integrated circuit, while ensuring that the ESD protection circuit device reliability is not compromised.
Analog Baseband Interface For Communication Systems
A communication system interface between a baseband unit and a radio frequency (RF) unit is configured to advantageously use a common set of lines to carry both transmit and receive baseband analog signals between the baseband and RF unit, thereby enabling a relatively lower signal count and permitting loopback testing of elements within the baseband and the RF units.
Frequency Synthesizer Apparatus And Methods For Improving Capacitor Code Search Accuracy Using Lsb Modulation
Emmanouil Terrovitis - Foster City CA, US Justin A. Hwang - Palo Alto CA, US
Assignee:
QUALCOMM Incorporated - San Diego CA
International Classification:
H03L 7/00
US Classification:
331 36 C
Abstract:
A frequency synthesizer is disclosed that includes an oscillator having an output to deliver a signal of a controllable frequency. The oscillator includes a capacitor bank responsive to an N-bit control signal to exhibit a capacitance. The oscillator output frequency is based on the capacitance. Control logic generates the N-bit control signal and determines each bit of the N-bit control signal through a binary search step and a modulation of a least-significant-bit (LSB) of the N-bit control signal. The LSB modulation, combined with the binary search for each bit, results in a higher accuracy frequency estimation.
Analog Baseband Interface For Communication Systems
A communication system interface between a baseband unit and a radio frequency (RF) unit is configured to advantageously use a common set of lines to carry both transmit and receive baseband analog signals between the baseband and RF unit, thereby enabling a relatively lower signal count and permitting loopback testing of elements within the baseband and the RF units.
Mitigating Fractional Spurs In Fractional-N Frequency Synthesizer Systems
One embodiment of the present invention sets forth a technique for mitigating fractional spurs in fractional-n frequency synthesizer circuits. The technique involves advantageously modifying certain least significant bit values in the programming bits of the fractional-n frequency synthesizer circuit to avoid pathological fractional bit patterns. As a result, fractional spurs present in conventional fractional-n frequency synthesizer circuits may be attenuated, thereby improving the overall quality of the resulting out signal.
- Campbell CA, US Justin Ann-Ping HWANG - Sunnyvale CA, US David Kuochieh SU - Saratoga CA, US
International Classification:
H03M 3/00
Abstract:
This disclosure provides an active envelope detector to generate an output voltage based on an input radio-frequency (RF) signal. The active envelope detector includes a plurality of transistors configured to operate in a sub-threshold mode and generate an output voltage based on the input RF signal. A delta-modulation analog-to-digital converter (ADC) and a sigma-delta modulation ADC are provided. Both ADCs include an implementation of the active envelope detector to receive input RF signals.
- Campbell CA, US Justin Ann-Ping Hwang - Sunnyvale CA, US David Kuochieh Su - Saratoga CA, US
International Classification:
H04W 52/02 H04W 4/80 H04L 5/10
Abstract:
This disclosure provides a method and apparatus for a staged wake-up of a wireless device. The wireless device may include a wireless wake-up receiver and a communication transceiver. The wireless device may begin operations in a low-power mode. The wireless wake-up receiver may identify radio-frequency (RF) activity and transition operation of the wireless device from the low-power mode to an active power mode when RF activity is identified. In some implementations, RF activity is identified when an energy pattern of a received RF signal is matched to an energy pattern associated with a known communication protocol.