Kelly C Casey

US Patent:

6362967, Mar 26, 2002

Filed:

Apr 20, 2000

Appl. No.:

09/552817

Inventors:

Kelly C. Casey - Flower Mound TX
Dennis M. McCoy - Dallas TX
Darren Daugherty - Irving TX

Assignee:

Teccor Electronics, LP - Irving TX

International Classification:

H05K 114

US Classification:

361736, 361719, 361720

Abstract:

A telephone line protection module having a printed circuit board base with conductive paths connected to pins of the module. Overvoltage sensitive semiconductor devices are soldered to the ends of a conductive bridge, and the bridge is spring-biased between a module cover and the conductive bridge. The semiconductor devices are thus forced into electrical contact with the printed circuit paths. In addition, in the event the semiconductor devices are thermally destroyed, the conductive bridge is forced by the spring into direct contact with the printed circuit paths.

US Patent:

6370000, Apr 9, 2002

Filed:

Apr 11, 2000

Appl. No.:

09/546718

Inventors:

Kelly C. Casey - Flower Mound TX
Dennis M. McCoy - Dallas TX

Assignee:

Teccor Electronics, LP - Irving TX

International Classification:

H02H 322

US Classification:

361119

Abstract:

A telephone line protection element constructed of three lead frames having contact fingers for holding therebetween a semiconductor cell providing overvoltage protection between the telephone line and the customer circuits. The lead frames are soldered to a resistive semiconductor material to provide a fail-safe mechanism that mechanically connects either the tip or ring telephone line conductors to ground if a sufficient overcurrent exists. In response to an overcurrent, the resistive semiconductor material generates heat and melts the solder in contact therewith, which allows a pre-bent member of the lead frame to move in contact with a ground terminal, thereby shunting the overcurrent to ground. The entire protection element includes very few components and is efficiently assembled and attached to the pins of a 5-pin module.

US Patent:

6407901, Jun 18, 2002

Filed:

Nov 8, 1999

Appl. No.:

09/436114

Inventors:

Kelly C. Casey - Flower Mound TX

Assignee:

Teccor Electronics, LP - Irving TX

International Classification:

H02H 900

US Classification:

361119, 361111, 361 56, 361 911

Abstract:

An integrated circuit ( ) providing overvoltage and overcurrent protection to a line ( ). The integrated circuit ( ) is constructed to provide overvoltage protection when a voltage exceeding a specified magnitude is impressed across the cathode and anode terminals ( ), irrespective of the gate-cathode current. A gate terminal ( ) is provided to trigger the overvoltage protection device into conduction when a gate current exceeding a predefined value is carried on the line ( ). The gate-cathode structure of the integrated circuit ( ) includes a semiconductor resistance ( ) which functions to make the gate current required for turn on higher, thereby allowing the gate-cathode terminals ( ) of the integrated circuit ( ) too be connected in series with the line ( ) to be protected.

US Patent:

6448589, Sep 10, 2002

Filed:

May 19, 2000

Appl. No.:

09/575861

Inventors:

Kelly C. Casey - Flower Mound TX

Assignee:

Teccor Electronics, L.P. - Irving TX

International Classification:

H01L 2974

US Classification:

257173, 438546

Abstract:

A connector block formed in a semiconductor chip to provide all contacts on the same side of the chip. The connector block is preferably formed by driving a slow diffusing dopant deep into the chip from both sides until the diffused dopant overlaps in the middle of the chip. The connector block is metalized with a top contact and connected to circuits. The bottom of the connector block is metallized and connected to other bottom side contacts which, in turn may be connected to circuits. This arrangement effectively allows all contacts to be available from the top side of the semiconductor chip.

US Patent:

6531717, Mar 11, 2003

Filed:

Feb 15, 2000

Appl. No.:

09/504224

Inventors:

Kelly C. Casey - Flower Mound TX

Assignee:

Teccor Electronics, L.P. - Irving TX

International Classification:

H01L 2974

US Classification:

257109, 257164, 257168

Abstract:

A semiconductor thyristor device that incorporates buried regions centrally located on the chip with respect to the other semiconductor regions. By centering an upper and lower buried region, larger-area contacts can be realized, thereby increasing the current capability of the device. In order to achieve low breakover voltage devices, the buried regions are offset laterally with respect to the respective emitter regions. The low voltage thyristor devices can be incorporated into five-pin protection modules for protecting customer circuits.

US Patent:

6696709, Feb 24, 2004

Filed:

Sep 5, 2002

Appl. No.:

10/235444

Inventors:

Kelly C. Casey - Flower Mound TX
Dimitris Jim Pelegris - Mount Prospect IL

Assignee:

Teccor Electronics, LP - Irving TX

International Classification:

H01L 2972

US Classification:

257173, 257163, 257167, 257174, 257177, 257182

Abstract:

A semiconductor thyristor device incorporates buried regions to achieve low breakover voltage devices, and the buried regions are offset laterally with respect to the emitter regions. The low voltage thyristor devices can be incorporated into five-pin protection modules for protecting customer circuits.

US Patent:

6862162, Mar 1, 2005

Filed:

Apr 23, 2003

Appl. No.:

10/421245

Inventors:

Kelly C. Casey - Flower Mound TX, US

Assignee:

TECCOR Electronics, LP - Irving TX

International Classification:

H02H003/20

US Classification:

361 911, 361 35

Abstract:

A thyristor provides overcurrent protection to a low impedance load, such as a transformer, by adding a resistance in series with the transformer winding. As overcurrents attempt to pass through the transformer winding, a sufficient voltage is generated in the transformer so that a thyristor connected thereacross is triggered into conduction. A resistance formed between the thyristor gate and cathode establishes the threshold of current that can pass through the transformer winding before the thyristor is triggered. When triggered into conduction, the thyristor shunts the current and the transformer is thus protected.

US Patent:

6956248, Oct 18, 2005

Filed:

Jun 11, 2003

Appl. No.:

10/460585

Inventors:

Kelly C. Casey - Flower Mound TX, US

Assignee:

Teccor Electronics, LP - Irving TX

International Classification:

H01L029/74

US Classification:

257107, 257112, 257164, 257168, 257173

Abstract:

A semiconductor thyristor device that incorporates buried region breakdown junctions laterally offset from an emitter region. By spacing the buried regions around the emitter region, current carriers emitted from the buried regions are distributed over a large area of the emitter region, thereby providing a high current capability during initial turn on of the device. In order to achieve low breakover voltage devices, the buried regions are characterized with high impurity concentrations, with the breakdown junctions located near the surface of the chip. The low voltage thyristor device minimizes the area of high dopant concentration junctions, thus minimizing the chip capacitance and permitting high speed, low voltage signal operation.