Hzo
Senior Development Engineer
Semiconductor Industry
Senior Process Engineer
Education:
University of Utah 1979 - 1984
Bachelors, Bachelor of Science, Chemical Engineering, Engineering
Skills:
Design of Experiments Electronics Manufacturing Semiconductors Root Cause Analysis Research Microsoft Office Leadership Management Failure Analysis Training Microsoft Word Microsoft Excel Process Engineering Spc Powerpoint Sales Photoshop
Span Construction and Engineering, Inc.
Project Manager
Okland Construction Jun 2003 - Aug 2007
Project Manager
Education:
Brigham Young University 1998 - 2000
Master of Business Administration, Masters
University of Utah 1981 - 1987
Bachelors, Bachelor of Science, Mining Engineering
Olympus High School
Skills:
Project Management Process Improvement Continuous Improvement Program Management Management Leadership Lean Manufacturing Earned Value Management Manufacturing Team Building Engineering Contract Negotiation Engineering Management Process Engineering Project Planning Ms Project Team Leadership Budgets Process Scheduler Operations Management Quality Assurance Cross Functional Team Leadership Strategic Planning Root Cause Analysis Microsoft Excel Procurement Subcontracting Supply Chain Management Aerospace Proposal Writing Construction Quality Management Purchasing Kaizen Value Stream Mapping Cpm Scheduling Change Management Project Engineering Government Contracting Logistics Problem Solving Analysis Systems Engineering Spc Manufacturing Operations Management 5S Supervisory Skills Strategic Sourcing Supply Chain Materials Management
Merit Sensor
Senior Engineer I
Merit Sensor
Senior Engineer
Hzo
Senior Development Engineer
Fairchild Semiconductor Mar 1998 - Aug 2011
Senior Process Engineer
Education:
University of Utah 1978 - 1984
Bachelors, Bachelor of Science, Chemical Engineering
Skills:
Semiconductors Design of Experiments Thin Films Failure Analysis Jmp Semiconductor Industry Electronics Spc Lean Manufacturing Pvd
Sreevatsa Sreekantham - West Jordan UT, US Ihsiu Ho - Salt Lake City UT, US Fred Session - Sandy UT, US Kent Naylor - Kaysville UT, US
Assignee:
Fairchild Semiconductor Corporation - South Portland ME
International Classification:
H01L 21/336
US Classification:
438270, 438589, 438677, 257333, 257409, 257E2141
Abstract:
A trench gate field effect transistor is formed as follows. A trench is formed in a semiconductor region, followed by a dielectric layer lining sidewalls and bottom of the trench and extending over mesa regions adjacent the trench. A conductive seed layer is formed in a bottom portion of the trench over the dielectric layer. A low resistance material is grown over the conductive seed layer, wherein the low resistance material is selective to the conductive seed layer.