Larry D Wise

US Patent:

40414620, Aug 9, 1977

Filed:

Apr 30, 1976

Appl. No.:

5/682002

Inventors:

Michael Ian Davis - Boca Raton FL
Gary Wayne Mayes - Boca Raton FL
Thomas Stephen McDermott - Boca Raton FL
Larry Edward Wise - Boca Raton FL

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 918

US Classification:

364200

Abstract:

A data processing system is described wherein, during linkage to a subroutine, by a single machine instruction, a complete status save and the assignment of a dynamic work area are effected. By another single machine instruction the process is reversed. The elements of the complete machine status and the dynamic work area are retained in a hardware controlled stack, thus permitting nesting of the subroutine calls.

US Patent:

40357791, Jul 12, 1977

Filed:

Apr 30, 1976

Appl. No.:

5/681985

Inventors:

Richard Eugene Birney - Boca Raton FL
Michael Ian Davis - Boca Raton FL
Robert Allen Hood - Boca Raton FL
Thomas Stephen McDermott - Boca Raton FL
Larry Edward Wise - Boca Raton FL

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1300

US Classification:

364200

Abstract:

System mode controls for obtaining limited addressability for supervisor programming operations without disturbing a user address key currently contained in a user key register (UKR). The mode controls are provided by bits in a system register called a level status register (LSR), which include an APM bit, and a supervisor state bit. The largest supervisor addressability is obtained when both the APM and supervisor state bits are set on, which permits execution of a supervisor program which can access user data and programs. In more detail, each instruction fetch must be in the supervisor key area, identified by a predetermined supervisor key value which is not in the UKR, while each operand of the fetched supervisor instruction is accessed in the user key area identified by the current key in the UKR. The supervisor is not permitted to access any user area which does not have its key in the UKR. Thus, the supervisor can be prevented from having addressability over part or all of the main memory.