Leilei P Zhang

US Patent:

7241640, Jul 10, 2007

Filed:

Feb 8, 2005

Appl. No.:

11/053510

Inventors:

Leilei Zhang - Sunnyvale CA, US

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

H01L 21/44
H01L 21/48
H01L 21/50

US Classification:

438106, 438 64, 438612, 257E21, 257508, 257E23, 257 69

Abstract:

Solder ball assembly for a semiconductor device and method of fabricating the same is described. In one example, a solder mask is formed on a substrate having an aperture exposing at least a portion of a conductive pad of the substrate. A solder pillar is formed in the aperture and in electrical communication with the conductive pad. An insulating layer is formed on the solder mask exposing at least a portion of the solder pillar. The exposed portion of the solder pillar is removed to define a mounting surface. A solder ball is formed on the mounting surface in electrical communication with the solder pillar. The solder pillar may include high-temperature solder having a melting point higher than that of the solder ball.

US Patent:

7342298, Mar 11, 2008

Filed:

Mar 9, 2004

Appl. No.:

10/796471

Inventors:

Leilei Zhang - Sunnyvale CA, US

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

H01L 23/495

US Classification:

257667, 257666, 257678, 257704, 257787, 257E23181

Abstract:

A metal lid for packaging semiconductor chips is stamped to form a sloped sidewall with a set-back from the edge of a package substrate. After the metal lid is placed over the semiconductor chip, molding compound is formed around portions of the exposed perimeter of the package substrate and against the sloped sidewall of the lid. The molding compound securely attaches the lid to the package substrate, providing improved reliability to the lid-substrate joint. The lightweight lid also increases standoff when a solder ball-grid array is used to connect the packaged IC to a printed wiring board, improving the reliability of the ball-grid array connections.

US Patent:

7388284, Jun 17, 2008

Filed:

Oct 14, 2005

Appl. No.:

11/250943

Inventors:

Leilei Zhang - Sunnyvale CA, US

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

H01L 23/06

US Classification:

257704, 257684, 257728

Abstract:

An integrated circuit package having a lid is disclosed. The integrated circuit package comprises a substrate having an embedded conductor exposed on a surface; a lid comprising a plurality of conductive portions; and a solder bond between the embedded conductor and the plurality of conductive portions of the lid. The substrate may comprise a recess for receiving a flange associated with the walls. The embedded conductor preferably comprises a conductor coupled to a power or ground plane of the substrate. A standoff within the walls may optionally be soldered to a contact pad on the substrate. A method of assembling an integrated circuit package is also disclosed.

US Patent:

7545028, Jun 9, 2009

Filed:

Jun 14, 2007

Appl. No.:

11/818665

Inventors:

Leilei Zhang - Sunnyvale CA, US

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

H01L 23/02

US Classification:

257678, 257738, 257777, 257780, 257E21257, 257E21499, 257E21508

Abstract:

Solder ball assembly for a semiconductor device and method of fabricating the same is described. In one example, a solder mask is formed on a substrate having an aperture exposing at least a portion of a conductive pad of the substrate. A solder pillar is formed in the aperture and in electrical communication with the conductive pad. An insulating layer is formed on the solder mask exposing at least a portion of the solder pillar. The exposed portion of the solder pillar is removed to define a mounting surface. A solder ball is formed on the mounting surface in electrical communication with the solder pillar. The solder pillar may include high-temperature solder having a melting point higher than that of the solder ball.

US Patent:

7652369, Jan 26, 2010

Filed:

Oct 14, 2005

Appl. No.:

11/250945

Inventors:

Leilei Zhang - Sunnyvale CA, US

Assignee:

XILINX, Inc. - San Jose CA

International Classification:

H01L 23/12

US Classification:

257704, 257710, 257730, 257E23128, 257E2318, 257E215, 257E21501

Abstract:

An integrated circuit package is disclosed. The integrated circuit package comprises an integrated circuit die having a plurality of solder bumps; and a substrate comprising a first plurality of contact pads on a first surface and a second plurality of contact pads on a second surface. The plurality of solder bumps on the integrated circuit die is coupled to the first plurality of contact pads on the first surface of the substrate, wherein at least one edge of the substrate is formed after the integrated circuit die is attached to the substrate. According to one embodiment of the invention, the at least one edge of the substrate is formed after excess substrate material is detached at designated areas. According to another aspect of the invention, an assembly fixture is disclosed. An apparatus and method for assembling an integrated circuit package are also disclosed.

US Patent:

7790510, Sep 7, 2010

Filed:

Jan 10, 2008

Appl. No.:

11/972428

Inventors:

Leilei Zhang - Sunnyvale CA, US

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

H01L 21/44

US Classification:

438121, 438124, 438127

Abstract:

A metal lid for packaging semiconductor chips is stamped to form a sloped sidewall with a set-back from the edge of a package substrate. After the metal lid is placed over the semiconductor chip, molding compound is formed around portions of the exposed perimeter of the package substrate and against the sloped sidewall of the lid. The molding compound securely attaches the lid to the package substrate, providing improved reliability to the lid-substrate joint. The lightweight lid also increases standoff when a solder ball-grid array is used to connect the packaged IC to a printed wiring board, improving the reliability of the ball-grid array connections.

US Patent:

7807501, Oct 5, 2010

Filed:

May 14, 2009

Appl. No.:

12/466248

Inventors:

Leilei Zhang - Sunnyvale CA, US

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

H01L 21/44

US Classification:

438108, 257E21551

Abstract:

An integrated circuit package is disclosed. The integrated circuit package comprises an integrated circuit die having a plurality of solder bumps; and a substrate comprising a first plurality of contact pads on a first surface and a second plurality of contact pads on a second surface. The plurality of solder bumps on the integrated circuit die is coupled to the first plurality of contact pads on the first surface of the substrate, wherein at least one edge of the substrate is formed after the integrated circuit die is attached to the substrate. According to one embodiment of the invention, the at least one edge of the substrate is formed after excess substrate material is detached at designated areas. According to another aspect of the invention, an assembly fixture is disclosed. An apparatus and method for assembling an integrated circuit package are also disclosed.

US Patent:

7821132, Oct 26, 2010

Filed:

Jun 5, 2007

Appl. No.:

11/810616

Inventors:

Leilei Zhang - Sunnyvale CA, US

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

H01L 23/48
H01L 23/52

US Classification:

257737, 257773, 257786, 257E23021

Abstract:

A contact pad in an integrated circuit is disclosed. The contact pad comprises a flat portion comprising a base of the contact pad; a plurality of projections extending from and substantially perpendicular to the flat portion; and a solder ball attached to the projections and the flat portion. A method of forming a contact pad is also disclosed.