Leslie A Pearey

US Patent:

52003590, Apr 6, 1993

Filed:

Oct 3, 1991

Appl. No.:

7/771399

Inventors:

Leslie A. Pearey - Boise ID
Timothy P. O'Brien - Boise ID
John E. Knudson - Boise ID
Thomas N. Melody - Boise ID
Russell C. Zahorik - Boise ID

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

H01L 21441

US Classification:

437192

Abstract:

A semiconductor processing method for decreasing electrical contact resistance between different elevation electrically conductive layers is disclosed. The method includes applying an aluminum layer atop a partially processed semiconductor wafer, with the aluminum layer having a defined upper surface. The semiconductor wafer with applied aluminum layer is exposed to an oxidizing atmosphere, forming an electrically resistive aluminum oxide at the upper surface of the aluminum layer. An interlayer insulating dielectric material is applied atop the aluminum layer. It is selectively patterned and etched to define a contact opening to the aluminum layer. A layer of titanium metal is applied atop the patterned and etched interlayer dielectric to a preselected thickness. The titanium metal contacts the upper aluminum oxide surface of the aluminum layer within the contact opening. The titanium metal is reacted with the aluminum oxide in the contact to transform aluminum oxide into a less electrically resistive titanium oxide.