Li Fu Chang from San Diego, CA, age 57

Wikipedia References

Li Fung Chang

Real Estate Brokers

Li Chang, Santa Clara CA

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Specialties:

Buyer's Agent
Listing Agent

Work:

Realty World, Platinum
3333 Bowers Ave. #130, Santa Clara, CA 95054
(650)7664836 (Office)

Li Chang, Burlingame CA Agent

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Work:

Realty World, Platinum
Burlingame, CA
(650)7664836 (Phone)

Interests:

Helping buyers and sellers in today's special market . Especially
for people who are in need of help with foreclosures.

About:

A Realtor on Your Side Li Chang (#01702341) is one of the most dedicated and committed Real Estate Agents in the Bay Area. Li is a member of the San Mateo Board of Realtors, as well as a certified member of Fannie Mae's HAFA(Home Affordable Foreclosure Alternatives),and experienced in Short Sales and REO’s. She is well versed in this current challenging market. Li is an excellent listener and is committed to providing star service to every customer and client. Li not only handles all the technical aspects of your Real Estate purchase or sale, but also looks after personal concerns. Li is committed to treating her clients with warmth and professionalism as well as always working to improve and be a team player. Li’s knowledge, experience, professionalism, integrity, and personal service make her an indispensable asset. Li always goes above and beyond what is normally expected. She specializes in getting the best results possible & building win-win situations for all parties involved. Please consider Li Chang to be your best RE partner. Together everyone achieves more. HAFA consultant and Short Sale specialist.

Resumes

Student At Montana State University-Bozeman

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Location:

Fremont, California

Industry:

Accounting

Work:

Freshens Quality Brands and Avogadro's Aug 2007 - Dec 2011
Customer Service and Assistant Manager
Bank of China Jul 2011 - Sep 2011
Internship

Education:

Montana State University 2008 - 2011
Bachelor of Science, Business; Accounting Option

Li Chang

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Li Chang

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Li Shu Chang

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English Second Language Teacher

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Work:

English Second Language Teacher

Owner

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Work:

Cambridge Acupuncture Association
Owner

Li Chang

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Location:

United States

Ceo At Grupo Rma

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Position:

ceo at Grupo RMA

Location:

United States

Industry:

Plastics

Work:

Grupo RMA
ceo

Medicine Doctors

Li Chang

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Specialties:

Pediatrics

Work:

Woodburn Pediatric Clinic LLP
2050 Progress Way, Woodburn, OR 97071
(503)9815348 (phone), (503)9810423 (fax)

Languages:

Chinese
English
French
Spanish
Tagalog

Description:

Ms. Chang works in Woodburn, OR and specializes in Pediatrics.

Name / Title

Company / Classification

Phones & Addresses

Li Chang
CEO

The North Face Store
ECO Outdoor Sports
Sportswear-Retail

2136 4 Ave W, Vancouver, BC V6K 1N6
(866)8867456

Li Chang
CEO

The North Face Store
Sportswear-Retail

(866)8867456

Li Chang
President

BEST USA LOGISTICS, INC
Transportation Services

47470 Seabridge Dr, Fremont, CA 94538
5670 Stewart Ave, Fremont, CA 94538
1570 Atlantic St, Union City, CA 94587

Li Chang
President

Mgi Interior Design, Inc
Business Services · Interior Designers

19925 Stevens Crk Blvd, Cupertino, CA 95014
(408)3291188

Li Hua Chang
Family And General Dentistry

Charles Chang
Dentist's Office · Dentists

14343 41 Ave, Flushing, NY 11355
1255 NE Hickory Ln, Bellevue, WA 98029
(646)6677633

Li Fei Chang

Chang Enterprise LLC
Real Estate · Business Services

175 Kootenai Dr, Fremont, CA 94539

Li Chuan Chang
President

CK LEARNING INC

99 S Ashton Ave, Millbrae, CA 94030

Li Chung Chang
Managing

Blossom Home, LLC
Real Estate Investment

936 Sandpiper Ln, Palo Alto, CA 94303

Us Patents

Cluster Path Processor Time Alignment For Signal Suppression/Separation In A Wireless Device
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US Patent:

7697596, Apr 13, 2010
Filed:

Mar 29, 2007
Appl. No.:

11/731317
Inventors:

Junqiang Li - Sunnyvale CA, US
Nelson R. Sollenberger - Farmingdale NJ, US
Li Fung Chang - Holmdel NJ, US
Mark David Hahm - Hartland WI, US
Hongwei Kong - Denville NJ, US
Assignee:

Broadcom Corporation - Irvine CA
International Classification:

H04B 1/00
US Classification:

375148, 375142, 375144, 375347
Abstract:

A system for processing radio frequency (RF) signals includes a searcher and a plurality of Cluster Path Processor (CPPs). The searcher detects a maximum signal energy level and position of at least one of a plurality of individual distinct path signals in a signal cluster of a first information signal, wherein at least a portion of the plurality of individual distinct path signals is received within a duration of a corresponding delay spread. The sampling position is used as a starting sampling location by the plurality of CPPs, including a first information signal CPP and a second information signal CPP. Fine sampling positions of the plurality of CPPs are based upon channel energy estimates for the plurality of individual distinct path signals. CPP outputs are employed to produce channel estimates, which are themselves used in subsequent equalization operations. Sampling positions may change over time in order to satisfy alignment criteria.

Method And System For Pipelined Processing In An Integrated Embedded Image And Video Accelerator
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US Patent:

7760951, Jul 20, 2010
Filed:

Feb 14, 2006
Appl. No.:

11/353528
Inventors:

Taiyi Cheng - San Jose CA, US
Mark Hahm - Hartland WI, US
Li Fung Chang - Holmdel NJ, US
Assignee:

Broadcom Corporation - Irvine CA
International Classification:

G06K 9/36
US Classification:

382234
Abstract:

A method and system for pipelined processing in an integrated embedded image and video accelerator is described. Aspects of a system for pipelined processing in an integrated embedded image and video accelerator may include circuitry that enables pipeline processing of video data within a single chip, wherein the pipeline processing may further include decoding of a block of video data while simultaneously inverse transforming a previously decoded block of video data. Aspects of the system may also include circuitry that enables transformation, within the single chip, of a block of said video data while simultaneously encoding, within said single chip, a previously transformed block of video data.

Apparatus And Method For E-Hich/E-Rgch Processing, Metric Estimation And Detection
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US Patent:

7873324, Jan 18, 2011
Filed:

Dec 21, 2007
Appl. No.:

11/962518
Inventors:

Jun Wu - San Diego CA, US
Hongwei Kong - Denville NJ, US
Li Fung Chang - Holmdel NJ, US
Assignee:

Broadcom Corporation - Irvine CA
International Classification:

H04B 17/00
US Classification:

455 6713, 455522, 455 6711, 455 631, 4552261, 4552262, 4552263, 455296, 375224, 375227, 375346, 370311, 370317, 370318, 370252
Abstract:

Apparatus and method for processing a received pilot to obtain noise estimation of a pilot channel and processing a received first signal channel, separately from a second signal channel that is orthogonal to the first signal channel, to obtain a signal level of the first signal channel. The noise estimation and the signal level are used to calculate a SNR value. Detection on the first channel is done by checking the SNR and the sign of a soft metric.

Method And System For Pipelined Processing In An Integrated Embedded Image And Video Accelerator
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US Patent:

8068681, Nov 29, 2011
Filed:

Jul 20, 2010
Appl. No.:

12/839591
Inventors:

Taiyi Cheng - San Jose CA, US
Mark Hahm - Hartland WI, US
Li Fung Chang - Holmdel NJ, US
Assignee:

Broadcom Corporation - Irvine CA
International Classification:

G06K 9/36
US Classification:

382234
Abstract:

A method and system for pipelined processing in an integrated embedded image and video accelerator is described. Aspects of a system for pipelined processing in an integrated embedded image and video accelerator may include circuitry that enables pipeline processing of video data within a single chip, wherein the pipeline processing may further include decoding of a block of video data while simultaneously inverse transforming a previously decoded block of video data. Aspects of the system may also include circuitry that enables transformation, within the single chip, of a block of said video data while simultaneously encoding, within said single chip, a previously transformed block of video data.

Method And System For A Ciphering Interface With List Processing
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US Patent:

8306219, Nov 6, 2012
Filed:

Feb 14, 2006
Appl. No.:

11/353687
Inventors:

Yi Zhou - Carlsbad CA, US
Li Fung Chang - Holmdel NJ, US
Nelson Sollenberger - Farmingdale NJ, US
Assignee:

Broadcom Corporation - Irvine CA
International Classification:

H04L 29/06
US Classification:

380 37, 341 58, 380 28, 380 44
Abstract:

A method and system for ciphering interface with list processing is described. Various aspects of a system for ciphering interface with list processing may include a cipher module that enables deciphering and/or bit stuffing, in hardware, of a potion of one of a plurality of data blocks starting at any bit location that is subsequent to a first bit of the one of the plurality of data blocks. One of the plurality of data blocks may comprise at least one data word. A modulus of a number representing the bit location with respect to a number of bits in the one of the data words may be a number greater than 0. The cipher module may enable selection of any bit location based on and index and/or an offset. The cipher module may enable selection of deciphering and/or bit stuffing based on configured information.

Method And System For Hardware And Software Shareable Dct/Idct Control Interface
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US Patent:

20070192393, Aug 16, 2007
Filed:

Feb 14, 2006
Appl. No.:

11/353367
Inventors:

Taiyi Cheng - San Jose CA, US
Mark Hahm - Hartland WI, US
Li Chang - Holmdel NJ, US
International Classification:

G06F 17/14
US Classification:

708402000
Abstract:

Certain aspects of a method and system for hardware and software shareable DCT/IDCT control interface are provided. A single DCT/IDCT interface may be utilized to provide hardware or software control of a DCT/IDCT module. During hardware control the DCT/IDCT module may be utilized for JPEG compression, for example. During software control a CPU may utilize the DCT/IDCT module for audio, software, and/or video applications, for example. The interface may enable selecting a quantization table for use by the DCT/IDCT module. The interface may also enable selecting encoding or decoding operations to be performed by the DCT/IDCT module. The interface may also enable toggling between a first and a second portion of a data buffer utilized by the DCT/IDCT module. Moreover, the interface may enable starting processing of a data block by the DCT/IDCT module and indicating when the DCT/IDCT module has completed processing the data block.

Method And System For Multimode Dc Offset Compensation
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US Patent:

20080130607, Jun 5, 2008
Filed:

Nov 30, 2006
Appl. No.:

11/565562
Inventors:

Junqiang Li - Sunnyvale CA, US
Nelson Sollenberger - Farmingdale NJ, US
Li Fung Chang - Holmdel NJ, US
International Classification:

H04B 7/216
H04B 1/12
H04L 25/06
US Classification:

370342, 455313, 375319
Abstract:

Aspects of a method and system for multimode DC offset compensation are presented. Aspects of the system may include accumulating a selected number of signal samples, determining an average of the accumulated signal samples, and keeping a running total of the average for use feedback signal generation. The signal samples may be, for example, samples of WCDMA signals. By keeping track of the signal offset error, the signal offset error, or residual DC, may be determined. For example the signal offset error may comprise a DC component and/or a sinusoidal component. The number of signal samples to accumulate for the average may be based on the signal offset error. For example, a threshold may be determined as part of design of an embodiment of the invention.

Method And System For Cqi Based Adaptive Diagonal Loading For Dmi-Eq In Hsdpa Receivers
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US Patent:

20090180455, Jul 16, 2009
Filed:

Oct 29, 2008
Appl. No.:

12/260591
Inventors:

Mukundan Ranganathan - San Diego CA, US
Li Fung Chang - Holmdel NJ, US
Abhinav Prasad - Woodbridge NJ, US
Nelson Sollenberger - Farmingdale NJ, US
Jun Wu - San Diego CA, US
International Classification:

H04B 7/216
US Classification:

370342
Abstract:

Aspects of a method and system for CQI based adaptive diagonal loading for DMI-EQ in HSDPA receivers. A HSDPA enabled handset may comprise a minimum-mean-square (MMSE)-based direct matrix inversion (DMI) equalizer (DMI-EQ) for an advanced signal processing. The DMI-EQ may receive HSDPA signal in consecutive transmission time intervals (TTIs). A diagonal loaded DMI may be used for a robust solution of equalizer weights. The DMI diagonal loading coefficients may be determined based on the CQI value of the current TTI and apply to the DMI-EQ for the next TTI. The determined CQI may be derived from SNR information estimated via a reference signal in the received signal. A look-up table mechanism is provided to select a set of DMI diagonal coefficients for a determined CQI and a particular modulation type. The look-up table may comprise mappings between the CQI for a particular modulation type and various DMI diagonal coefficients.