Liang Zhihong X Wang

US Patent:

7761379, Jul 20, 2010

Filed:

Jun 26, 2006

Appl. No.:

11/475722

Inventors:

Scott M. Zoldi - San Diego CA, US
Liang Wang - San Diego CA, US
Li Sun - San Diego CA, US
Steven G. Wu - San Diego CA, US

Assignee:

Fair Isaac Corporation - Minneapolis MN

International Classification:

G06Q 40/00

US Classification:

705 44

Abstract:

A system and method for managing mass compromise of financial transaction devices is disclosed. A method includes maintaining a summary of a transaction history for a financial transaction device, and forming a device history profile based on the transaction history, the device history profile including predictive variables indicative of fraud associated with the financial transaction device. A method further includes generating a fraud score based on the predictive variables, the fraud score representing a likelihood that the financial transaction device is compromised will be used fraudulently.

US Patent:

7945515, May 17, 2011

Filed:

Jul 16, 2010

Appl. No.:

12/838303

Inventors:

Scott M. Zoldi - San Diego CA, US
Liang Wang - San Diego CA, US
Li Sun - San Diego CA, US
Steven G. Wu - San Diego CA, US

Assignee:

Fair Isaac Corporation - Minneapolis MN

International Classification:

G06Q 40/00

US Classification:

705 44

Abstract:

A system and method for managing mass compromise of financial transaction devices is disclosed. A method includes maintaining a summary of a transaction history for a financial transaction device, and forming a device history profile based on the transaction history, the device history profile including predictive variables indicative of fraud associated with the financial transaction device. A method further includes generating a fraud score based on the predictive variables, the fraud score representing a likelihood that the financial transaction device is compromised will be used fraudulently.

US Patent:

8638334, Jan 28, 2014

Filed:

Nov 25, 2008

Appl. No.:

12/323242

Inventors:

Hailin Jin - San Jose CA, US
Liang Wang - Lexington KY, US

Assignee:

Adobe Systems Incorporated - San Jose CA

International Classification:

G06T 15/00

US Classification:

345520, 345419, 345582

Abstract:

Techniques for selectively displaying surfaces of an object model to a user are described. In one embodiment, a computer-implemented method may include, for a given one of a plurality of surfaces included in an object model that is representative of a physical object, determining a normal vector of the given surface. The method may also include determining an angle between the normal vector of the given surface and a current viewing direction of the model. The method may further include displaying the object model to a user without displaying the given surface to the user, dependent upon determining that the angle between the normal vector and the current viewing direction is greater than a threshold value.

US Patent:

20090018940, Jan 15, 2009

Filed:

Mar 28, 2008

Appl. No.:

12/058554

Inventors:

Liang Wang - San Diego CA, US
Michael M. Pratt - Cardiff CA, US
Anuj Taneja - Bangalore, IN
Jenny G. Zhang - San Diego CA, US

International Classification:

G06Q 40/00

US Classification:

705 35

Abstract:

A computer-implemented fraud detection system and method are disclosed. A method includes monitoring past customer account transactions conducted with a selected one or more transaction devices, and generating a predictive model that combines customer account transaction profiles with transaction device profiles related to the one or more transaction devices, and storing a representation of the predictive model in a storage. A system for detecting fraud in financial transaction includes a fraud detection computer that receives, through a communications network, customer account transaction data obtained by a monitoring device of a transaction device according to one or more transaction device variables of a transaction device profile.

US Patent:

20130126867, May 23, 2013

Filed:

May 2, 2012

Appl. No.:

13/462676

Inventors:

Liang Wang - Milpitas CA, US
Ilyas Mohammed - Santa Clara CA, US
Masud Beroz - Morrisville NC, US

Assignee:

INVENSAS CORPORATION - San Jose CA

International Classification:

H01L 29/06
H01L 29/04
H01L 29/12
H01L 33/08
H01L 21/20

US Classification:

257 52, 438 34, 438486, 257618, 257 76, 257E33002, 257E2109, 257E29022, 257E29068, 257E29003

Abstract:

High yield substrate assembly. In accordance with a first method embodiment, a plurality of piggyback substrates are attached to a carrier substrate. The edges of the plurality of the piggyback substrates are bonded to one another. The plurality of piggyback substrates are removed from the carrier substrate to form a substrate assembly. The substrate assembly is processed to produce a plurality of integrated circuit devices on the substrate assembly. The processing may use manufacturing equipment designed to process wafers larger than individual instances of the plurality of piggyback substrates.

US Patent:

20130215121, Aug 22, 2013

Filed:

Feb 17, 2012

Appl. No.:

13/399952

Inventors:

Gabriel Z. Guevara - San Jose CA, US
Ilyas Mohammed - Santa Clara CA, US
Liang Wang - Milpitas CA, US

Assignee:

INVENSAS CORPORATION - San Jose CA

International Classification:

H05K 7/20
G06T 1/00
B05D 5/12
F21V 29/00

US Classification:

345501, 361720, 174252, 362382, 36224902, 427 58

Abstract:

Heat spreading substrate. In accordance with an embodiment of the present invention, an apparatus includes a thermally conductive, electrically insulating regular solid, a first electrically conductive coating mechanically coupled to a first edge of the regular solid and a second electrically conductive coating mechanically coupled to a second edge of the regular solid. The first and the second electrically conductive coatings are electrically isolated from one another and the faces of the first electrically conductive coating, the second electrically conductive coating and the regular solid are substantially co-planar. The primary and secondary surfaces of the regular solid may be free of electrically conductive materials.

US Patent:

20130288412, Oct 31, 2013

Filed:

Jun 3, 2013

Appl. No.:

13/908902

Inventors:

Liang WANG - Milpitas CA, US
Ilyas MOHAMMED - Santa Clara CA, US
Masud BEROZ - Morrisville NC, US

Assignee:

Invensas Corporation - San Jose CA

International Classification:

H01L 33/00

US Classification:

438 34

Abstract:

High yield substrate assembly. In accordance with a first method embodiment, a plurality of piggyback substrates are attached to a carrier substrate. The edges of the plurality of the piggyback substrates are bonded to one another. The plurality of piggyback substrates are removed from the carrier substrate to form a substrate assembly. The substrate assembly is processed to produce a plurality of integrated circuit devices on the substrate assembly. The processing may use manufacturing equipment designed to process wafers larger than individual instances of the plurality of piggyback substrates.

US Patent:

20140008607, Jan 9, 2014

Filed:

Jul 3, 2012

Appl. No.:

13/541559

Inventors:

Liang Wang - Milpitas CA, US
Ilyas Mohammed - Santa Clara CA, US
Masud Beroz - Apex NC, US

Assignee:

INVENSAS CORPORATION - San Jose CA

International Classification:

H01L 33/06

US Classification:

257 13, 438 28

Abstract:

Improved quantum efficiency of multiple quantum wells. In accordance with an embodiment of the present invention, an article of manufacture includes a p side for supplying holes and an n side for supplying electrons. The article of manufacture also includes a plurality of quantum well periods between the p side and the n side, each of the quantum well periods includes a quantum well layer and a barrier layer, with each of the barrier layers having a barrier height. The plurality of quantum well periods include different barrier heights.