Luca Fumagalli

US Patent:

20220302032, Sep 22, 2022

Filed:

Jun 10, 2022

Appl. No.:

17/806438

Inventors:

- Boise ID, US
Christian George Emor - Singapore, SG
Luca Fumagalli - Boise ID, US
John D. Hopkins - Meridian ID, US
Rita J. Klein - Boise ID, US
Christopher W. Petz - Boise ID, US
Everett A. McTeer - Eagle ID, US

International Classification:

H01L 23/535
H01L 23/532
H01L 21/768
H01L 27/11582
H01L 27/11524
H01L 27/11556
H01L 27/1157

Abstract:

A microelectronic device includes a first conductive structure, a barrier structure, a conductive liner structure, and a second conductive structure. The first conductive structure is within a first filled opening in a first dielectric structure. The barrier structure is within the first filled opening in the first dielectric structure and vertically overlies the first conductive structure. The conductive liner structure is on the barrier structure and is within a second filled opening in a second dielectric structure vertically overlying the first dielectric structure. The second conductive structure vertically overlies and is horizontally surrounded by the conductive liner structure within the second filled opening in the second dielectric structure. Memory devices, electronic systems, and methods of forming microelectronic devices are also described.

US Patent:

20210287990, Sep 16, 2021

Filed:

Mar 16, 2020

Appl. No.:

16/820046

Inventors:

- Boise ID, US
Christian George Emor - Singapore, SG
Luca Fumagalli - Boise ID, US
John D. Hopkins - Meridian ID, US
Rita J. Klein - Boise ID, US
Christopher W. Petz - Boise ID, US
Everett A. McTeer - Eagle ID, US

International Classification:

H01L 23/535
H01L 23/532
H01L 21/768
H01L 27/11524
H01L 27/11556
H01L 27/1157
H01L 27/11582

Abstract:

A microelectronic device comprises a first conductive structure, a barrier structure, a conductive liner structure, and a second conductive structure. The first conductive structure is within a first filled opening in a first dielectric structure. The barrier structure is within the first filled opening in the first dielectric structure and vertically overlies the first conductive structure. The conductive liner structure is on the barrier structure and is within a second filled opening in a second dielectric structure vertically overlying the first dielectric structure. The second conductive structure vertically overlies and is horizontally surrounded by the conductive liner structure within the second filled opening in the second dielectric structure. Memory devices, electronic systems, and methods of forming microelectronic devices are also described.

US Patent:

20200321340, Oct 8, 2020

Filed:

Jun 19, 2020

Appl. No.:

16/906718

Inventors:

- Boise ID, US
Yongjun J. Hu - Boise ID, US
Amirhasan Nourbakhsh - Boise ID, US
Durai Vishak Nirmal Ramaswamy - Boise ID, US
Christopher W. Petz - Boise ID, US
Luca Fumagalli - Boise ID, US

International Classification:

H01L 27/108

Abstract:

A method of forming an apparatus comprises forming a first metal nitride material over an upper surface of a conductive material within an opening extending through at least one dielectric material through a non-conformal deposition process. A second metal nitride material is formed over an upper surface of the first metal nitride material and side surfaces of the at least one dielectric material partially defining boundaries of the opening through a conformal deposition process. A conductive structure is formed over surfaces of the second metal nitride material within the opening. Apparatuses and electronic systems are also described.

US Patent:

20200212046, Jul 2, 2020

Filed:

Dec 28, 2018

Appl. No.:

16/235957

Inventors:

- Boise ID, US
Yongjun J. Hu - Boise ID, US
Amirhasan Nourbakhsh - Boise ID, US
Durai Vishak Nirmal Ramaswamy - Boise ID, US
Christopher W. Petz - Boise ID, US
Luca Fumagalli - Boise ID, US

International Classification:

H01L 27/108

Abstract:

A method of forming an apparatus comprises forming a first metal nitride material over an upper surface of a conductive material within an opening extending through at least one dielectric material through a non-conformal deposition process. A second metal nitride material is formed over an upper surface of the first metal nitride material and side surfaces of the at least one dielectric material partially defining boundaries of the opening through a conformal deposition process. A conductive structure is formed over surfaces of the second metal nitride material within the opening. Apparatuses and electronic systems are also described.

US Patent:

20150263281, Sep 17, 2015

Filed:

Jun 1, 2015

Appl. No.:

14/727106

Inventors:

- Boise ID, US
Luca Fumagalli - Boise ID, US

International Classification:

H01L 45/00

Abstract:

A phase change memory cell comprising a first chalcogenide compound on a first electrode, a first nitrogenated carbon material directly on the first chalcogenide compound, a second chalcogenide compound directly on the first nitrogenated carbon material, and a second nitrogenated carbon material directly on the second chalcogenide compound and directly on a second electrode. Other phase change memory cells are described. A method of forming a phase change memory cell and a phase change memory device are also described.