Mark L Burgener

US Patent:

6531739, Mar 11, 2003

Filed:

Apr 5, 2001

Appl. No.:

09/828289

Inventors:

James S. Cable - San Diego CA
Eugene F. Lyons - Santee CA
Michael A. Stuber - Carlsbad CA
Mark L. Burgener - San Diego CA

Assignee:

Peregrine Semiconductor Corporation - San Diego CA

International Classification:

H01L 2701

US Classification:

257347, 257348, 257349, 257350, 257351, 257352

Abstract:

A method for eliminating the radiation-induced off-state current in the P-channel ultrathin silicon-on-sapphire transistor, by providing a retrograde dopant concentration profile that has the effect of moving the Fermi level at the back of the device away from that part of the bandgap where the interface states are located. When the Fermi level does not swing through this area in any region of operation of the device, subthreshold stretchout of the I-V curves does not occur.

US Patent:

6804502, Oct 12, 2004

Filed:

Oct 8, 2002

Appl. No.:

10/267531

Inventors:

Mark L. Burgener - San Diego CA
James S. Cable - San Diego CA

Assignee:

Peregrine Semiconductor Corporation - San Diego CA

International Classification:

H04B 128

US Classification:

455333, 455425, 4555501, 257341

Abstract:

A novel RF switch circuit and method for switching RF signals is described. The RF switch circuit is fabricated in a silicon-on-insulator (SOI) technology. The RF switch includes pairs of switching and shunting transistor groupings used to alternatively couple RF input signals to a common RF node. The switching and shunting transistor grouping pairs are controlled by a switching control voltage (SW) and its inverse (SW_). The switching and shunting transistor groupings comprise one or more MOSFET transistors connected together in a âstackedâ or serial configuration. The stacking of transistor grouping devices, and associated gate resistors, increase the breakdown voltage across the series connected switch transistors and operate to improve RF switch compression. A fully integrated RF switch is described including digital control logic and a negative voltage generator integrated together with the RF switch elements. In one embodiment, the fully integrated RF switch includes a built-in oscillator, a charge pump circuit, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit.

US Patent:

7088971, Aug 8, 2006

Filed:

Jun 22, 2005

Appl. No.:

11/158597

Inventors:

Mark L. Burgener - San Diego CA, US
James S. Cable - Del Mar CA, US

Assignee:

Peregrine Semiconductor Corporation - San Diego CA

International Classification:

H04B 1/04

US Classification:

4551271, 4551273, 455126, 455129, 330 10

Abstract:

A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Preferred fabrication techniques include stacking multiple FETs to form switching devices. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal. A preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits, and a four-way antenna switch to selectably couple a single antenna connection to any one of the four circuits.

US Patent:

7123898, Oct 17, 2006

Filed:

Aug 18, 2004

Appl. No.:

10/922135

Inventors:

Mark L. Burgener - San Diego CA, US
James S. Cable - Del Mar CA, US

Assignee:

Peregrine Semiconductor Corporation - San Diego CA

International Classification:

H04B 1/28
H01L 29/76
H04Q 7/20
H04M 1/00

US Classification:

455333, 455425, 4555501, 257341

Abstract:

A novel RF buffer circuit adapted for use with an RF switch circuit and method for switching RF signals is described. The RF switch circuit is fabricated in a silicon-on-insulator (SOI) technology. The RF switch includes pairs of switching and shunting transistor groupings used to alternatively couple RF input signals to a common RF node. The switching and shunting transistor grouping pairs are controlled by a switching control voltage (SW) and its inverse (SW_). The switching and shunting transistor groupings comprise one or more MOSFET transistors connected together in a “stacked” or serial configuration. The stacking of transistor grouping devices, and associated gate resistors, increase the breakdown voltage across the series connected switch transistors and operate to improve RF switch compression. A fully integrated RF switch is described including digital control logic and a negative voltage generator integrated together with the RF switch elements. In one embodiment, the fully integrated RF switch includes a built-in oscillator, a charge pump circuit, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit.

US Patent:

7248120, Jul 24, 2007

Filed:

Jun 23, 2004

Appl. No.:

10/875405

Inventors:

Mark L. Burgener - San Diego CA, US
James S. Cable - San Diego CA, US

Assignee:

Peregrine Semiconductor Corporation - San Diego CA

International Classification:

H03F 3/04

US Classification:

330311, 330277

Abstract:

A method and apparatus is described for controlling conduction between two nodes of an integrated circuit via a stack of FETs of common polarity, coupled in series. In an RF Power Amplifier (PA) having appropriate output filtering, or in a quad mixer, stacks of two or more FETs may be used to permit the use of increased voltages between the two nodes. Power control for such RF PAs may be effected by varying a bias voltage to one or more FETs of the stack. Stacks of three or more FETs may be employed to control conduction between any two nodes of an integrated circuit.

US Patent:

7460852, Dec 2, 2008

Filed:

Oct 16, 2006

Appl. No.:

11/582206

Inventors:

Mark L. Burgener - San Diego CA, US
James S. Cable - Del Mar CA, US

Assignee:

Peregrine Semiconductor Corporation - San Diego CA

International Classification:

H04B 1/28
H01L 26/76
H04Q 7/20
H04M 1/00

US Classification:

455333, 455425, 4555501, 257241

Abstract:

An RF switch circuit and method for switching RF signals that may be fabricated using common integrated circuit materials such as silicon, particularly using insulating substrate technologies. The RF switch includes switching and shunting transistor groupings to alternatively couple RF input signals to a common RF node, each controlled by a switching control voltage (SW) or its inverse (SW_), which are approximately symmetrical about ground. The transistor groupings each comprise one or more insulating gate FET transistors connected together in a “stacked” series channel configuration, which increases the breakdown voltage across the series connected transistors and improves RF switch compression. A fully integrated RF switch is described including control logic and a negative voltage generator with the RF switch elements. In one embodiment, the fully integrated RF switch includes an oscillator, a charge pump, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit.

US Patent:

7613442, Nov 3, 2009

Filed:

May 11, 2005

Appl. No.:

11/127520

Inventors:

Dylan J. Kelly - San Diego CA, US
Mark L. Burgener - San Diego CA, US
James S. Cable - Del Mar CA, US

Assignee:

Peregrine Semiconductor Corporation - San Diego CA

International Classification:

H04B 1/28
H01L 29/76
H04Q 7/20
H04M 1/00

US Classification:

455333, 455425, 4555501, 257341, 323220, 323234, 323271, 323274

Abstract:

A novel RF switch circuit and method for switching RF signals is described. The RF switch circuit is fabricated in a silicon-on-insulator (SOI) technology. The RF switch includes pairs of switching and shunting transistor groupings used to alternatively couple RF input signals to a common RF node. A fully integrated RF switch is described including digital control logic and a negative voltage generator integrated together with the RF switch elements. In one embodiment, the fully integrated RF switch includes a built-in oscillator, a charge pump circuit, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit. Several embodiments of the charge pump, level shifting, voltage divider, and RF buffer circuits are described. The RF switch provides improvements in insertion loss, switch isolation, and switch compression. An improved voltage reducing circuit is described.

US Patent:

7719343, May 18, 2010

Filed:

Sep 8, 2003

Appl. No.:

10/658154

Inventors:

Mark L. Burgener - San Diego CA, US
Dylan Kelly - San Diego CA, US
James S. Cable - San Diego CA, US

Assignee:

Peregrine Semiconductor Corporation - San Diego CA

International Classification:

H02M 3/18
G05F 3/16
H03B 5/00

US Classification:

327536, 327537, 363 60

Abstract:

A charge pump method and apparatus is described having various aspects. Noise injection from a charge pump to other circuits may be reduced by limiting both positive and negative clock transition rates, as well as by limiting drive currents within clock generator driver circuits, and also by increasing a control node AC impedance of certain transfer capacitor coupling switches. A single-phase clock may be used to control as many as all active switches within a charge pump, and capacitive coupling may simplify biasing and timing for clock signals controlling transfer capacitor coupling switches. Any combination of such aspects of the method or apparatus may be employed to quiet and/or simplify charge pump designs over a wide range of charge pump architectures.