Mark R Kline

US Patent:

45161992, May 7, 1985

Filed:

Dec 5, 1980

Appl. No.:

6/213380

Inventors:

Gideon Frieder - Williamsville NY
David T. Hughes - Amherst NY
Mark H. Kline - Williamsville NY
John T. Liebel - Williamsville NY
David P. Meier - Orchard Park NY
Edward A. Wolff - Tonawanda NY

Assignee:

Nanodata Computer Corporation - Buffalo NY

International Classification:

G06F 900

US Classification:

364200

Abstract:

A data processing system comprising an active and intelligent main store including a main memory, a main store controller for accessing the main memory in a manner allowing different address and data structures, and a main store bus connected to the controller. At least one processor of a first type is connected to the main store bus, this being an auxiliary processor for performing input-output and other operations. At least one processor of a second type also is connected to the main store bus, this being an execution processor for fetching, decoding and executing instructions. All or some of either or both of the auxiliary processors and execution processors may be different. A supervisory processor for initiating configuring and monitoring the system is connected to the main store bus. A communication bus is connected to the processors of the first and second types and to the supervisory processor. A diagnostic bus connects the supervisory processor to each of the processors of the first and second types.

US Patent:

43542255, Oct 12, 1982

Filed:

Oct 11, 1979

Appl. No.:

6/083648

Inventors:

Gideon Frieder - Williamsville NY
David T. Hughes - Amherst NY
Mark H. Kline - Williamsville NY
John T. Liebel - Williamsville NY
David P. Meier - Orchard Park NY
Edward A. Wolff - Tonawanda NY

Assignee:

Nanodata Computer Corporation - Buffalo NY

International Classification:

G06F 1300
G06F 1516

US Classification:

364200

Abstract:

A data processing system comprising an active and intelligent main store including a main memory, a main store controller for accessing the main memory in a manner allowing different address and data structures, and a main store bus connected to the controller. At least one processor of a first type is connected to the main store bus, this being an auxiliary processor for performing input-output and other operations. At least one processor of a second type also is connected to the main store bus, this being an execution processor for fetching, decoding and executing instructions. All or some of either or both of the auxiliary processors and execution processors may be different. A supervisory processor for initiating configuring and monitoring the system is connected to the main store bus. A communication bus is connected to the processors of the first and second types and to the supervisory processor. A diagnostic bus connects the supervisory processor to each of the processors of the first and second types.

US Patent:

45272379, Jul 2, 1985

Filed:

Apr 14, 1983

Appl. No.:

6/483444

Inventors:

Gideon Frieder - Williamsville NY
David T. Hughes - Amherst NY
Mark H. Kline - Williamsville NY
John T. Liebel - Williamsville NY
David P. Meier - Orchard Park NY
Edward A. Wolff - Tonawanda NY

Assignee:

Nanodata Computer Corporation - Buffalo NY

International Classification:

G06F 1300

US Classification:

364200

Abstract:

A data processing system comprising an active and intelligent main store including a main memory, a main store controller for accessing the main memory in a manner allowing different address and data structures, and a main store bus connected to the controller. At least one processor of a first type is connected to the main store bus, this being an auxiliary processor for performing input-output and other operations. At least one processor of a second type also is connected to the main store bus, this being an execution processor for fetching, decoding and executing instructions. All or some of either or both of the auxiliary processors and execution processors may be different. A supervisory processor for initiating configuring and monitoring the system is connected to the main store bus. A communication bus is connected to the processors of the first and second types and to the supervisory processor. A diagnostic bus connects the supervisory processor to each of the processors of the first and second types.

US Patent:

42329248, Nov 11, 1980

Filed:

Oct 23, 1978

Appl. No.:

5/953645

Inventors:

Mark H. Kline - Williamsville NY
John T. Liebel - Williamsville NY
Ronald D. Sheridan - Williamsville NY

Assignee:

Nanodata Corporation - Buffalo NY

International Classification:

H05K 107

US Classification:

339 17L

Abstract:

An adapter for transferring the electrical connections of a circuit card of an electrical system from a fixed connector in a congested chassis area on one side of a master interconnect board to a convenient access area on the opposite side of the master board. The adapter comprises a first electrical connector element for making electrical connection to the system at a location on the opposite side of the master board in correspondence with the fixed connector, a second electrical connector element for making electrical connection to the circuit card, and an element for joining the first and second electrical connector elements mechanically and electrically adjacent the opposite side of the master board. A circuit card can be disconnected from the fixed connector and moved to the opposite side of the master board and connected to the second electrical connector of the adapter to facilitate working on the circuit card in a manner which does not increase significantly the electrical path length from the master board to the circuit card.