Mark T Morris

US Patent:

6841888, Jan 11, 2005

Filed:

Jun 4, 2003

Appl. No.:

10/455733

Inventors:

Yongan Yan - Thousand Oaks CA, US
Douglas Evan Meyers - Calabasas CA, US
Mark Allen Morris - Calabasas CA, US
D. Laurence Meixner - Camarillo CA, US
Satyabrata Raychaudhuri - Thousand Oaks CA, US

Assignee:

Yazaki Corporation

International Classification:

H01L 310203
H01L 2328
H01L 2329

US Classification:

257794, 257788, 257787, 257433, 257789

Abstract:

An encapsulant for use with opto-electronic devices and optical components incorporates a filler made from a glass that has been processed into particle form and heated to a predetermined temperature for a predetermined time, along with an epoxy having an index of refraction matched to that of the glass and heated to a predetermined temperature for a predetermined time, to prevent settling of the filler particles after mixing the filler particles with the epoxy, and thereby obtaining uniform dispersion of the particles within the epoxy. The encapsulant provides for high light transmittance, and its coefficient of thermal expansion can be varied by varying the amount of filler without substantially altering the optical properties of the encapsulant. The coefficient of thermal expansion variation within the encapsulant preferably is less than 30%, due to uniform dispersion of the filler particles within the epoxy.

US Patent:

7304102, Dec 4, 2007

Filed:

Dec 7, 2004

Appl. No.:

11/007766

Inventors:

Yongan Yan - Thousand Oaks CA, US
Douglas Evan Meyers - Calabasas CA, US
Mark Allen Morris - Calabasas CA, US
D. Laurence Meixner - Camarillo CA, US
Satyabrata Raychaudhuri - Thousand Oaks CA, US

Assignee:

Yazaki Corporation

International Classification:

C08L 63/00
B32B 27/04
B32B 27/20
B32B 27/38
H01L 21/56

US Classification:

523427, 523440, 523443, 523444, 523445, 523466, 525525, 428413, 438127

Abstract:

An encapsulant for use with opto-electronic devices and optical components incorporates a filler made from a glass that has been processed into particle form and heated to a predetermined temperature for a predetermined time, along with an epoxy having an index of refraction matched to that of the glass and heated to a predetermined temperature for a predetermined time, to prevent settling of the filler particles after mixing the filler particles with the epoxy, and thereby obtaining uniform dispersion of the particles within the epoxy. The encapsulant provides for high light transmittance, and its coefficient of thermal expansion can be varied by varying the amount of filler without substantially altering the optical properties of the encapsulant. The coefficient of thermal expansion variation within the encapsulant preferably is less than 30%, due to uniform dispersion of the filler particles within the epoxy.

US Patent:

7311972, Dec 25, 2007

Filed:

Oct 14, 2004

Appl. No.:

10/967115

Inventors:

Yongan Yan - Thousand Oaks CA, US
Douglas Meyers - Calabasas CA, US
Mark Morris - Calabasas CA, US
D. Laurence Meixner - Camarillo CA, US
Satyabrata Raychaudhuri - Thousand Oaks CA, US

Assignee:

Yazaki Corporation - Tokyo

International Classification:

B32B 27/38
B32B 27/04
B32B 27/20
H01L 21/56
C08L 63/00

US Classification:

428413, 438127, 523427, 523440, 523443, 523444, 523445, 523466, 525525

Abstract:

An encapsulant is described for an optoelectronic device or optical component, which provides a coefficient of thermal expansion of less than 50 ppm/ C. , with a variation of less than 30%, and further provides an optical transmittance of at least 20% at a wavelength in the range of 400 to 900 nm, at an encapsulant thickness of about 1 mm. The encapsulant includes a filler consisting essentially of glass particles having diameters smaller than 500 μm, being essentially free of titania and lead oxide, and having a refractive index in the range of 1. 48 to 1. 60, with a variance of less than about 0. 001. A method for making the encapsulant also is described, the method including steps of (1) processing the glass to form particles having diameters between 1 and 500 μm, (2) preparing an epoxy resin composition having at a cured stage a refractive index close to that of the glass filler particles, (3) mixing the epoxy resin composition with the filler particles to form a filled epoxy resin composition, (4) encapsulating an optoelectronic device with the filled epoxy resin composition, and (5) curing the filled epoxy resin composition.

US Patent:

7381359, Jun 3, 2008

Filed:

Oct 14, 2004

Appl. No.:

10/967646

Inventors:

Yongan Yan - Thousand Oaks CA, US
Douglas Meyers - Calabasas CA, US
Mark Morris - Calabasas CA, US
D. Laurence Meixner - Camarillo CA, US
Satyabrata Raychaudhuri - Thousand Oaks CA, US

Assignee:

Yazaki Corporation

International Classification:

H01L 21/56
C08L 63/00
H01L 23/29
B32B 27/04
B32B 27/20
B32B 27/38

US Classification:

26427211, 257787, 257789, 257793, 26427213, 26427217, 428413, 438127, 523427, 523440, 523443, 523444, 523445, 525523, 525524, 525525, 525526

Abstract:

An encapsulant is described for an optoelectronic device or optical component, which provides a coefficient of thermal expansion of less than 50 ppm/ C. , with a variation of less than 30%, and further provides an optical transmittance of at least 20% at a wavelength in the range of 400 to 900 nm, at an encapsulant thickness of about 1 mm. The encapsulant includes a filler consisting essentially of glass particles having diameters smaller than 500 μm, being essentially free of titania and lead oxide, and having a refractive index in the range of 1. 48 to 1. 60, with a variance of less than about 0. 001. A method for making the encapsulant also is described, the method including steps of (1) processing the glass to form particles having diameters between 1 and 500 μm, (2) preparing an epoxy resin composition having at a cured stage a refractive index close to that of the glass filler particles, (3) mixing the epoxy resin composition with the filler particles to form a filled epoxy resin composition, (4) encapsulating an optoelectronic device with the filled epoxy resin composition, and (5) curing the filled epoxy resin composition.

US Patent:

20130071254, Mar 21, 2013

Filed:

Oct 29, 2012

Appl. No.:

13/663398

Inventors:

Honeywell International Inc. - Morristown NJ, US
Mark C. Morris - Phoenix AZ, US
Steve Halfmann - Chandler AZ, US
Ardeshir Riahi - Scottsdale AZ, US

Assignee:

HONEYWELL INTERNATIONAL INC. - Morristown NJ

International Classification:

F01D 5/30
F01D 5/14
F01D 5/18

US Classification:

416 90 R, 416244 A, 416243, 416223 A

Abstract:

Turbine blades and methods of forming modified turbine blades and turbine rotors for use in an engine are provided. In an embodiment, by way of example only, a turbine blade includes a platform and an airfoil. The platform includes a surface configured to define a portion of a flowpath, and the surface includes an initial contour configured to plastically deform into an intended final contour after an initial exposure of the blade to an operation of the engine. The airfoil extends from the platform.

US Patent:

48247960, Apr 25, 1989

Filed:

Jul 10, 1987

Appl. No.:

7/077953

Inventors:

Tzu-Yin Chiu - Marlboro NJ
Gen M. Chin - Marlboro NJ
Ronald C. Hanson - Middletown NJ
Maureen Y. Lau - Keyport NJ
Kwing F. Lee - Aberdeen NJ
Mark D. Morris - Freehold NJ
Alexander M. Voshchenkov - Freehold NJ
Avinoam Kornblit - Highland Park NJ
Joseph Lebowitz - Watchung NJ
William T. Lynch - Summit NJ

Assignee:

American Telephone and Telegraph Company - New York NY
AT&T Bell Laboratories - Murray Hill NJ

International Classification:

H01L 2170
H01L 2700

US Classification:

437 57

Abstract:

A process for creating bipolar and CMOS transistors on a p-type silicon substrate is disclosed. The silicon substrate has typical n+ buried wells and field oxide regions to isolate the individual transistor devices. In accordance with the process, stacks of material are created over the gate elements of the CMOS devices and over the emitter elements of the bipolar transistors. The stacks of material over the gate elements have a silicon dioxide gate layer in contact with the epitaxial layer of the substrate, and the stacks of material over the emitter elements have a polycrystalline silicon layer in contact with the epitaxial layer. Walls of silicon dioxide are created around the stacks in order to insulate the material within the stacks from the material deposited outside of the walls. Polycrystalline silicon in contact with the epitaxial layer is deposited outside the walls surrounding the stacks. All polycrystalline silicon layers in contact with the epitaxial layer are implanted with appropriate dopants such that these layers serve as reservoirs of dopant in order to simultaneously create the source and drain elements of the CMOS devices and the emitter elements of the bipolar devices during a heating step in the process.

US Patent:

47849711, Nov 15, 1988

Filed:

May 8, 1987

Appl. No.:

7/047946

Inventors:

Tzu-Yin Chiu - Marlboro NJ
Gen M. Chin - Marlboro NJ
Maureen Y. Lau - Keyport NJ
Kwing F. Lee - Aberdeen NJ
Mark D. Morris - Freehold NJ

Assignee:

American Telephone and Telegraph Company, AT&T Bell Laboratories - Murray Hill NJ

International Classification:

H01L 2170
H01L 2700

US Classification:

437057

Abstract:

A process for creating bipolar and CMOS transistors on a p-type silicon substrate is disclosed. The silicon substrate has a typical n+ buried wells and field oxide regions to isolate the individual transistor devices. In accordance with the process, stacks of material are created over the gate elements of the CMOS devices and over the emitter elements of the bipolar transistors. The stacks of material over the gate elements have a silicon dioxide gate layer in contact with the epitaxial layer of the substrate, and the stacks of material over the emitter elements have a polycrystalline silicon layer in contact with the epitaxial layer. Walls of silicon dioxide are created around the stacks in order to insulate the material within the stacks from the material deposited outside of the walls. Polycrystalline silicon in contact with the epitaxial layer is deposited outside the walls surrounding the stacks. All polycrystalline silicon layers in contact with the epitaxial layer are implanted with appropriate dopants such that these layers serve as reservoirs of dopant in order to simultaneously create the source and drain elements of the CMOS devices and the emitter elements of the bipolar device during a heating step in the process.

US Patent:

20220305040, Sep 29, 2022

Filed:

Jun 16, 2022

Appl. No.:

17/842042

Inventors:

- New York NY, US
Santiago Roel Santos - New York NY, US
Eric A. Marcotulli - New York NY, US
Daniel A. Alminana - New York NY, US
Mark Morris - New York NY, US
Leonard Pershing Guarente - Newton MA, US

International Classification:

A61K 31/706
A61P 1/16
A61K 9/00
A61K 31/09

Abstract:

Provided herein are methods and compositions related to treating and/or preventing liver related diseases and disorders and for improving liver health in a subject by administering to the subject (e.g., orally administering to the subject) a composition comprising nicotinamide riboside and/or pterostilbene.