Martin E Garcia

US Patent:

20220359727, Nov 10, 2022

Filed:

May 10, 2021

Appl. No.:

17/316091

Inventors:

- Austin TX, US
Rodney Arlan Barksdale - Buda TX, US
Stephen C. Chew - Dripping Springs TX, US
Martin Garcia - Buda TX, US
Wayne Geoffrey Risner - Austin TX, US

International Classification:

H01L 29/66
H01L 29/78
H01L 29/40
H01L 29/08

Abstract:

A method for manufacturing a Laterally Diffused Metal Oxide Semiconductor (LDMOS) transistor with implant alignment spacers includes etching a gate stack comprising a first nitride layer. The first nitride layer is on a silicon layer. The gate stack is separated from a substrate by a first oxide layer. The gate stack is oxidized to form a polysilicon layer from the silicon layer, and to form a second oxide layer on a sidewall of the polysilicon layer. A drain region of the LDMOS transistor is implanted with a first implant aligned to a first edge formed by the second oxide layer. A second nitride layer is formed conformingly covering the second oxide layer. A nitride etch-stop layer is formed conformingly covering the second nitride layer.