Matthew Walter Gilbert

US Patent:

6662297, Dec 9, 2003

Filed:

Dec 30, 1999

Appl. No.:

09/474834

Inventors:

Douglas D. Boom - Portland OR
Matthew M. Gilbert - Hillsboro OR

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 950

US Classification:

712245, 709104, 709108, 710264, 710267, 712228, 712244

Abstract:

The method and apparatus feature detecting and prioritizing one or more interrupt service requests; inserting interrupt servicing instructions responsive to the interrupt service request into an instruction queue mechanism; and processing the instructions within the instruction queue mechanism including the inserted interrupt servicing instructions. The instruction queue mechanism may include an instruction cache and an instruction fetch unit for fetching instructions from the instruction cache, wherein the processing includes decoding the instructions into micro-opcodes and executing the micro-opcodes in one or more out-of-order execution units. Further features include retiring the executed micro-opcodes including those micro-opcodes representing the inserted interrupt servicing instructions to the instruction cache. Preferably, the criteria for interrupting the core processor include the priority of the interrupts and the capacity of the processor to allocate bandwidth to interrupt servicing. Most preferably, the prioritizing is dynamically responsive to changing allocation criteria, e. g.

US Patent:

6771595, Aug 3, 2004

Filed:

Aug 31, 1999

Appl. No.:

09/387077

Inventors:

Matthew M. Gilbert - Beaverton OR
Douglas D. Boom - Portland OR

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H04L 1200

US Classification:

370229, 370412, 370419, 710 56

Abstract:

A resource controller allocates a portion of network memory to a receive path for receiving data and to a transmit path for transmitting data. Network traffic patterns are monitored including the amount of data received and transmitted by the network processing device. The resource controller determines based on the monitored traffic patterns if the transmit path or receive path has allocated a desire amount of network memory. The resource controller removes underutilized resources in the receive or transmit paths. Removed network memory is returned to a resource pool and made available for allocation to another receive path or transmit path that needs additional network memory. An artificial intelligence system predicts future network resource allocations to further increase the efficiency of the resource controllers network resource allocation. The resource controller can monitor multiple network interface cards with the resource controller dynamically reallocating network resources amongst the multiple network interfaces.

US Patent:

7213137, May 1, 2007

Filed:

Oct 31, 2003

Appl. No.:

10/698144

Inventors:

Douglas D. Boom - Portland OR, US
Matthew M. Gilbert - Hillsboro OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 9/50

US Classification:

712245, 710264, 712228, 712244, 718104, 718108

Abstract:

The method and apparatus feature detecting an interrupt service request; storing into an instruction cache interrupt service instructions in response to detecting the interrupt service request; and fetching instructions from the instruction cache into an instruction stream sequence, the instruction stream sequence including mainline program instructions and the interrupt service instructions resulting in allocating core processor bandwidth between the interrupt servicing and mainline program instructions while executing the instruction stream sequence based on an interrupt priority; and processing instructions within the instruction stream sequence including the mainline program instructions and the inserted interrupt servicing instructions. The method and apparatus further feature recycling of executed micro-ops and detecting imminent context switch for interrupt service instruction preparation.