Michael P Brady

US Patent:

7298925, Nov 20, 2007

Filed:

Sep 30, 2003

Appl. No.:

10/675094

Inventors:

Tomasz J. Nowicki - Briarcliff Manor NY, US
Marco Martens - Groningen, NL
Jennifer Q. Trelewicz - Gilroy CA, US
Timothy J. Trenary - Berthoud CO, US
Joan L. Mitchell - Longmont CO, US
Michael T. Brady - Ithaca NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06K 9/32

US Classification:

382298, 382235

Abstract:

A method and system for efficient scaling in the transform domain, wherein transform coefficient data is provided as an input to a data processing system and scaled in the transform domain by application of a combined matrix. Some embodiments utilize discrete cosine transform data. One embodiment of the invention generates a combined matrix for one-dimensional scaling by selecting a rational scaling factor and matrix dimension value, generating a matrix with some zero values, applying a one-dimensional inverse transform, regrouping, and applying a one-dimensional forward transform. One application of the invention performs up-scaling operations, and another performs down-scaling operations. The invention also provides for two-dimensional scaling by selecting horizontal and vertical scaling parameters and generating first and second combined matrices responsive to the parameters and combining them into a single combined matrix. The invention may also incorporate a predetermined cost function.

US Patent:

7474805, Jan 6, 2009

Filed:

Aug 27, 2007

Appl. No.:

11/845359

Inventors:

Tomasz J. Nowicki - Briarcliff Manor NY, US
Marco Martens - Groningen, NL
Jennifer Q. Trelewicz - Gilroy CA, US
Timothy J. Trenary - Berthoud CO, US
Joan L. Mitchell - Longmont CO, US
Michael T. Brady - Ithaca NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06K 9/32
G06F 17/14

US Classification:

382298, 708400

Abstract:

Methods and systems for efficient scaling in the transform domain are provided when transform coefficient data is provided as an input to a data processing system, comprising generating a first matrix from transform coefficient data; zeroing out a row or column of, or inserting a row or column of zeros into, the first matrix; generating a second matrix by applying a one-dimensional inverse transform to the first matrix with the zeroed-out at least one row, the at least one column, the inserted at least one row of zeros or the at least one column of zeros; generating a third matrix by regrouping the second matrix; generating a combined matrix by applying a forward transform to the third matrix; and the data processing system scaling the data represented by the transform coefficient data by applying the combined matrix to the transform coefficient data.

US Patent:

52497330, Oct 5, 1993

Filed:

Jul 16, 1992

Appl. No.:

7/915492

Inventors:

Michael F. Brady - Morrisville PA
Rajan D. Deshmukh - Yardley PA

Assignee:

AT&T Bell Laboratories - Murray Hill NJ

International Classification:

B23K 100
B23K 3538

US Classification:

22818022

Abstract:

A solder self-alignment process for aligning a semiconductor chip (13) with, and bonding the chip to, a substrate (12) is preformed in an atmosphere rich in gaseous formic acid, at least during the melting step. It is preferred that the formic acid atmosphere be maintained during the self-alignment step and the step of cooling and hardening the solder elements (23). With this feature, one can completely avoid the use of any solid or liquid fluxes and avoid the consequences of such use. Nonetheless, the molten solder elements (23) dependably bond to the bonding surfaces and vertically align themselves.

US Patent:

61778729, Jan 23, 2001

Filed:

Nov 13, 1998

Appl. No.:

9/192052

Inventors:

Venkata S. Rao Kodukula - Peekskill NY
Michael John Brady - Brewster NY

Assignee:

Intermec IP Corp. - Woodland Hills CA

International Classification:

G08B 1314

US Classification:

3405727

Abstract:

An impedance matching circuit in accordance with the principles of the present invention employs series-connected transmission lines to match a high reflection coefficient source impedance with a load impedance. The matching circuit is formed on a dielectric substrate material and accommodates the relatively limited capabilities of photo-lithographic circuit production. The new impedance matching circuit may be constructed of three series-connected transmission line sections. A first section, the section that is to be connected to the source, transforms the high source impedance into a relatively low valued impedance that is substantially resistive. The reflection coefficient of the first section is substantially equal to the reflection coefficient of the source. A second may be implemented as a quarter-wave transformer that transforms the low impedance developed by the first section into an intermediate impedance value. The third section transforms this intermediate value impedance into an impedance that substantially matches that of the load.

US Patent:

62154028, Apr 10, 2001

Filed:

Nov 13, 1998

Appl. No.:

9/191642

Inventors:

Venkata S. Rao Kodukula - Peekskill NY
Michael John Brady - Brewster NY
Christopher Adam Feild - Yorktown Heights NY
Paul Andrew Moskowitz - Yorktown Heights NY

Assignee:

Intermec IP Corp. - Woodland Hills CA

International Classification:

G08B 1314

US Classification:

3405728

Abstract:

A radio-frequency identification (RFID) transponder (tag) in accordance with the principles of the invention includes a patch antenna. The patch antenna may be co-located with RFID circuitry and an impedance matching circuit on one side of a substrate. A ground plane may be formed on the opposite side of the substrate. A quarter wave transformer may provide an "RF short" to ground to connect the RFID circuitry on one side of the substrate with a ground plane located on the opposite side of the substrate.

US Patent:

62397036, May 29, 2001

Filed:

Apr 28, 1999

Appl. No.:

9/300968

Inventors:

Daniel J. Friedman - Tarrytown NY
Paul A. Moskowitz - Yorktown Heights NY
Michael J. Brady - Brewster NY
Harley K. Heinrich - Brewster NY

Assignee:

Intermec IP Corp - Wilmington DE

International Classification:

G08B 1341

US Classification:

3405727

Abstract:

A bonding pad for a semiconductor device is provided with a mechanical supportive structure substantially surrounding the pad. The mechanical supportive structure prevents cracking of passivation material over the pad when a lead is compression bonded to the pad.

US Patent:

57575037, May 26, 1998

Filed:

Dec 26, 1995

Appl. No.:

8/579617

Inventors:

Michael Francis Brady - Morrisville PA
Hung Ngoc Nguyen - Bensalem PA

Assignee:

Lucent Technologies Inc. - Murray Hill NJ

International Classification:

G01B 1100

US Classification:

356400

Abstract:

A method and apparatus measures a deviation in alignment between two components of a product wherein each component is characterized by a respective pattern and wherein each pattern comprises respective elements. The centroid of each element in each respective pattern is indicated, and based on the centroid indications, the center of each respective pattern is indicated. The deviation in alignment between the two components is determined as a function of the indicated position of the centers of the respective patterns, and positioning of the components is controlled as a function of the indicated position of the centers of the respective patterns.

US Patent:

61199214, Sep 19, 2000

Filed:

Feb 19, 1999

Appl. No.:

9/252729

Inventors:

Michael Francis Brady - Morrisville PA
Mindaugas Fernand Dautartas - Alburtis PA
James F. Dormer - Limekiln PA
Sailesh Mansinh Merchant - Orlando FL
Casimir Roman Nijander - Lawrenceville NJ
John William Osenbach - Kutztown PA

Assignee:

Lucent Technologies - Murray Hill NJ

International Classification:

B23K 3100
B23K10140
G02B 1318

US Classification:

2281241

Abstract:

The invention is a method and resulting device which provides a strong bond between a silicon substrate and an oxide component mounted within a cavity in the substrate. A layer of titanium, for example, is deposited on the walls of the cavity, followed by deposition of a layer of aluminum. The structure is preferably annealed to form titanium silicide and titanium-aluminum interface layers. The component is then bonded to the aluminum layer.