Michael K Eneboe from Georgetown, TX, age 68

Us Patents

Method For Processing File System Service Requests In A Computer Having An Attached Disk Drive That Can Reproduce Stream Data And Non-Stream Data
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US Patent:

6615312, Sep 2, 2003
Filed:

Feb 29, 2000
Appl. No.:

09/515275
Inventors:

Christopher L. Hamlin - Los Gatos CA
Michael K. Eneboe - San Jose CA
Andrew D. Hospodor - Los Gatos CA
Assignee:

Western Digital Ventures, Inc. - Lake Forest CA
International Classification:

G06F 1200
US Classification:

711112, 711156, 711161
Abstract:

This invention is directed to a method for processing file system service requests in a computer having an attached disk drive that in response to commands from the computer can write data to or read data from disk locations to reproduce stream data and non-stream data. The method comprises the steps of responding to a first file system service request by recording whether the first file system service request is for non-stream data or stream data, associating a first set of disk locations of the disk drive with the first file system service request, and preparing a first command that requires access to the first set of disk locations, the first command including control data categorizing the command as a non-stream access command or as a stream access command in response to the step of recording. The method includes transmitting the first command to the disk drive.

Interscalable Interconnect
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US Patent:

6654946, Nov 25, 2003
Filed:

Oct 30, 2001
Appl. No.:

10/021414
Inventors:

Michael Eneboe - San Jose CA
Christopher L. Hamlin - Los Gatos CA
Assignee:

LSI Logic Corporation - Milpitas CA
International Classification:

G06F 1750
US Classification:

716 18, 716 7, 716 17
Abstract:

The present invention provides a comprehensive design environment defining a system architecture and methodology that may integrate interconnects, cores, ePLC, re-configurable processors and software into a manageable and predictable system designs that achieve on-time system IC design results meeting desired specifications and budgets. For example, an interscalable interconnect maybe provided that is scalable and isochronous capable. Additionally, an abstract language may be provided to be able to describe interconnecting core functions. Further, a self-programmable chip may be provided that, upon receiving a construct, it could program itself to achieve the desired functionality, such as through the use of on-chip knowledge and the like.

Converting Asynchronous Packets Into Isochronous Packets For Transmission Through A Multi-Dimensional Switched Fabric Network
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US Patent:

6744772, Jun 1, 2004
Filed:

Nov 30, 2000
Appl. No.:

09/728634
Inventors:

Michael K. Eneboe - San Jose CA
Andrew D. Hospodor - Los Gatos CA
Assignee:

Western Digital Ventures, Inc. - Lake Forest CA
International Classification:

H04L 1256
US Classification:

370400, 370466, 370351, 370230, 370474
Abstract:

A switched node for use in a multi-dimensional switched fabric network is disclosed. The switched node comprises adapter circuitry connected to receive asynchronous and isochronous packets from an external entity. Each asynchronous packet comprises destination node routing information and data, and each isochronous packet comprises a path ID corresponding to a reserved path through the network, an arrival time parameter identifying a target arrival time of the isochronous packet into the switched node, and data. An asynchronous-to-isochronous converter converts the asynchronous packets into isochronous packets comprising the data from the asynchronous packets.

System And Method For Optimizing An Integrated Circuit Design
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US Patent:

6751783, Jun 15, 2004
Filed:

Oct 30, 2001
Appl. No.:

10/021696
Inventors:

Michael Eneboe - San Jose CA
Christopher L. Hamlin - Los Gatos CA
Assignee:

LSI Logic Corporation - Milpitas CA
International Classification:

G06F 1750
US Classification:

716 2, 716 1, 716 17
Abstract:

The present invention provides a comprehensive design environment defining a system architecture and methodology that may integrate interconnects, cores, ePLC, re-configurable processors and software into a manageable and predictable system designs that achieve on-time system IC design results meeting desired specifications and budgets. For example, an interscalable interconnect maybe provided that is scalable and isochronous capable. Additionally, an abstract language may be provided to be able to describe interconnecting core functions. Further, a self-progrmnmable chip may be provided that, upon receiving a construct, it could program itself to achieve the desired functionality, such as through the use of on-chip knowledge and the like.

System And Method For Designing An Integrated Circuit
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US Patent:

6792584, Sep 14, 2004
Filed:

Oct 30, 2001
Appl. No.:

10/021619
Inventors:

Michael Eneboe - San Jose CA
Christopher L. Hamlin - Los Gatos CA
Assignee:

LSI Logic Corporation - Milpitas CA
International Classification:

G06F 1750
US Classification:

716 8, 716 18, 716 1, 716 17, 716 2, 716 7
Abstract:

The present invention provides a comprehensive design environment defining a system architecture and methodology that may integrate interconnects, cores, ePLC, re-configurable processors and software into a manageable and predictable system designs that achieve on-time system IC design results meeting desired specifications and budgets. For example, an interscalable interconnect maybe provided that is scalable and isochronous capable. Additionally, an abstract language may be provided to be able to describe interconnecting core functions. Further, a self-programmable chip may be provided that, upon receiving a construct, it could program itself to achieve the desired functionality, such as through the use of on-chip knowledge and the like.

Distributed Resource Reservation System For Establishing A Path Through A Multi-Dimensional Computer Network To Support Isochronous Data
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US Patent:

6888831, May 3, 2005
Filed:

Sep 28, 2000
Appl. No.:

09/675850
Inventors:

Andrew D. Hospodor - Los Gatos CA, US
Michael K. Eneboe - San Jose CA, US
Assignee:

Western Digital Ventures, Inc. - Lake Forest CA
International Classification:

H04L012/28
H04L012/56
US Classification:

370394, 370468, 370400
Abstract:

A distributed method of establishing a path in a multi-dimensional computer network comprising a plurality of nodes for transmitting isochronous data from a source node to a destination node is disclosed. A request packet is injected into the network, the request packet specifying a request to transmit the isochronous data from one of a plurality of source nodes. The request packet is routed to at least one the plurality of source nodes, and the source node determines whether it has sufficient resources to support transmitting the isochronous data. If the source node comprises sufficient resources to support transmitting the isochronous data, the source node reserves resources within the source node to support transmitting the isochronous data, and transmits an ack packet from the source node to a first neighboring node. The first neighboring node determines whether it has sufficient resources to support transmitting the isochronous data. If the first neighboring node comprises sufficient resources to support transmitting the isochronous data, the first neighboring node reserves resources within the first neighboring node to support transmitting the isochronous data, and transmits the ack packet to an adjacent node.

Resource Reservation System In A Computer Network To Support End-To-End Quality-Of-Service Constraints
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US Patent:

6965563, Nov 15, 2005
Filed:

Sep 28, 2000
Appl. No.:

09/678177
Inventors:

Andrew D. Hospodor - Los Gatos CA, US
Michael K. Eneboe - San Jose CA, US
Assignee:

Western Digital Ventures, Inc. - Lake Forest CA
International Classification:

H04L012/26
US Classification:

370231, 360 721, 711154
Abstract:

A computer network is disclosed comprising a plurality of interconnected computer devices including a plurality of disk drives for storing network data, each disk drive comprising a head and a disk. The computer network comprises a plurality of interconnected nodes, and a reservation facility for reserving resources within the disk drives and the nodes to support a predetermined Quality-of-Service constraint with respect to data transmitted between the disk drives through the nodes of the computer network. In one embodiment, a switched node is disclosed comprising switching circuitry having more than two bi-directional ports for simultaneously transmitting data in multiple dimensions through a computer network, a disk for storing data, a head actuated over the disk for writing data to and reading data from the disk, and a reservation facility for reserving resources associated with data read from the disk and written to the disk to support the predetermined Quality-of-Service constraint with respect to data transmitted through the computer network.

Disk Drive And Method Of Manufacturing Same Including A Network Address And Server-Contacting Program
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US Patent:

6973495, Dec 6, 2005
Filed:

Jul 18, 2000
Appl. No.:

09/618767
Inventors:

Matthew W. Milne - Chino CA, US
Michael K. Eneboe - San Jose CA, US
Scott T. Hughes - Laguna Beach CA, US
Vu V. Luu - Milpitas CA, US
Assignee:

Western Digital Ventures, Inc. - Lake Forest CA
International Classification:

G06F015/16
US Classification:

709227, 709202, 709203, 709217, 709219, 709222
Abstract:

A disk drive is manufactured with a stored server-contacting program and a network address. Preferably, a protected area is provided for retaining the server-contacting program and the network address in the disk drive while it travels through a distribution channel to be installed in a user's personal computer system. The disk drive has firmware installed during manufacturing to initiate execution of the server-contacting program at an appropriate time, preferably when a selected condition has been met.