Michael Gregory Ferrara

US Patent:

20230127391, Apr 27, 2023

Filed:

Dec 23, 2022

Appl. No.:

18/088182

Inventors:

- Santa Clara CA, US
Michael G. Ferrara - Palo Alto CA, US
Jay E.S. Peterson - San Francisco CA, US

Assignee:

Barefoot Networks, Inc. - Santa Clara CA

International Classification:

G06F 16/903
G11C 11/406
G06F 16/901
G11C 7/10
H04L 45/74
H04L 45/745

Abstract:

An algorithmic TCAM based ternary lookup method is provided. The method stores entries for ternary lookup into several sub-tables. All entries in each sub-table have a sub-table key that includes the same common portion of the entry. No two sub-tables are associated with the same sub-table key. The method stores the keys in a sub-table keys table in TCAM. Each key has a different priority. The method stores the entries for each sub-table in random access memory. Each entry in a sub-table has a different priority. The method receives a search request to perform a ternary lookup for an input data item. A ternary lookup into the ternary sub-table key table stored in TCAM is performed to retrieve a sub-table index. The method performs a ternary lookup across the entries of the sub-table associated with the retrieved index to identify the highest priority matched entry for the input data item.

US Patent:

20200259765, Aug 13, 2020

Filed:

Feb 12, 2020

Appl. No.:

16/789339

Inventors:

- Santa Clara CA, US
Jay Evan Scott PETERSON - San Francisco CA, US
Michael Gregory FERRARA - Palo Alto CA, US
Michael E. ATTIG - Sunnyvale CA, US

International Classification:

H04L 12/935
H04L 29/06
H04L 12/933
H04L 12/851
H04L 12/741

Abstract:

Some embodiments provide a network forwarding IC with packet processing pipelines, at least one of which includes a parser, a set of match-action stages, and a deparser. The parser is configured to receive a packet and generate a PHV including a first number of data containers storing data for the packet. A first match-action stage is configured to receive the PHV from the parser and expand the PHV to a second, larger number of data containers storing data for the packet. Each of a set of intermediate match-action stage is configured to receive the expanded PHV from a previous stage and provide the expanded PHV to a subsequent stage. A final match-action stage is configured to receive the expanded PHV and reduce the PHV to the first number of data containers. The deparser is configured to receive the reduced PHV from the final match-action stage and reconstruct the packet.

US Patent:

20200204501, Jun 25, 2020

Filed:

Feb 28, 2020

Appl. No.:

16/804960

Inventors:

- Santa Clara CA, US
Patrick BOSSHART - Plano TX, US
Jay Evan Scott PETERSON - San Francisco CA, US
Michael Gregory FERRARA - Palo Alto CA, US
Steven Licking - San Jose CA, US
Chaitanya Kodeboyina - Los Altos CA, US

International Classification:

H04L 12/931
H04L 12/00

Abstract:

A synchronous packet-processing pipeline whose data paths are populated with data-plane stateful processing units (DSPUs) is provided. A DSPU is a programmable processor whose operations are synchronous with the dataflow of the packet-processing pipeline. A DSPU performs every computation with fixed latency. Each DSPU is capable of maintaining a set of states and perform its computations based on its maintained set of states. The programming of a DSPU determines how and when the DSPU updates one of its maintained states. Such programming may configure the DSPU to update the state based on its received packet data, or to change the state regardless of the received packet data.

US Patent:

20200162372, May 21, 2020

Filed:

Nov 18, 2019

Appl. No.:

16/687278

Inventors:

- Santa Clara CA, US
Michael G. FERRARA - Palo Alto CA, US
Jay E. S. PETERSON - San Francisco CA, US

International Classification:

H04L 12/721
H04L 12/26
H04L 12/935
H04L 12/851
H04L 12/741
H04L 29/06
G06F 9/448

Abstract:

A forwarding element includes data plane forwarding circuitry for forwarding data messages received by the forwarding element to other network elements in a network. The data-plane forwarding circuitry includes several snapshot-match circuitry units. Each snapshot-match circuitry unit compares a set of header fields of incoming data messages with a corresponding matching data. The data-plane forwarding circuitry also includes several snapshot-capture circuitry units. Each snapshot-capture circuitry units stores a set of header fields of data messages that matches a corresponding matching data

US Patent:

20190236103, Aug 1, 2019

Filed:

Apr 12, 2019

Appl. No.:

16/383448

Inventors:

- Santa Clara CA, US
Michael G. Ferrara - Palo Alto CA, US
Jay E. S. Peterson - San Francisco CA, US

International Classification:

G06F 16/903
G06F 16/901
G11C 7/10
G11C 11/406

Abstract:

An algorithmic TCAM based ternary lookup method is provided. The method stores entries for ternary lookup into several sub-tables. All entries in each sub-table have a sub-table key that includes the same common portion of the entry. No two sub-tables are associated with the same sub-table key. The method stores the keys in a sub-table keys table in TCAM. Each key has a different priority. The method stores the entries for each sub-table in random access memory. Each entry in a sub-table has a different priority. The method receives a search request to perform a ternary lookup for an input data item. A ternary lookup into the ternary sub-table key table stored in TCAM is performed to retrieve a sub-table index. The method performs a ternary lookup across the entries of the sub-table associated with the retrieved index to identify the highest priority matched entry for the input data item.

US Patent:

20190238665, Aug 1, 2019

Filed:

Apr 12, 2019

Appl. No.:

16/383276

Inventors:

- Santa Clara CA, US
Michael Gregory Ferrara - Palo Alto CA, US
Michael E. Attig - Sunnyvale CA, US
Jay Evan Scott Peterson - San Francisco CA, US

International Classification:

H04L 29/06
H04L 12/24
G06F 9/30
H04L 12/721
H04L 12/741

Abstract:

A method of configuring a forwarding element that includes several data plane message processing stages. The method stores a set of action codes in an instruction memory in the data plane of the forwarding element. Each action code identifies an operation to perform on a field of a message received at the data plane. The method determines action codes required to process each field of the message in each message processing stage. The method configures a data-plane processing unit of the forwarding element to concurrently perform a group of the action codes in the same data plane processing stage when (i) the action codes are the same and (ii) operate on the same field of the message.

US Patent:

20190179971, Jun 13, 2019

Filed:

Apr 8, 2016

Appl. No.:

15/094914

Inventors:

- Palo Alto CA, US
Michael G. Ferrara - Palo Alto CA, US
Jay E. S. Peterson - San Francisco CA, US

International Classification:

G06F 17/30
G11C 7/10
G11C 11/406

Abstract:

An algorithmic TCAM based ternary lookup method is provided. The method stores entries for ternary lookup into several sub-tables. All entries in each sub-table have a sub-table key that includes the same common portion of the entry. No two sub-tables are associated with the same sub-table key. The method stores the keys in a sub-table keys table in TCAM. Each key has a different priority. The method stores the entries for each sub-table in random access memory. Each entry in a sub-table has a different priority. The method receives a search request to perform a ternary lookup for an input data item. A ternary lookup into the ternary sub-table key table stored in TCAM is performed to retrieve a sub-table index. The method performs a ternary lookup across the entries of the sub-table associated with the retrieved index to identify the highest priority matched entry for the input data item.

US Patent:

20180234355, Aug 16, 2018

Filed:

Feb 4, 2018

Appl. No.:

15/888050

Inventors:

- Santa Clara CA, US
Patrick Bosshart - Plano TX, US
Jay Evan Scott Peterson - San Francisco CA, US
Michael Gregory Ferrara - Palo Alto CA, US
Steven Licking - San Jose CA, US
Chaitanya Kodeboyina - Los Altos CA, US

International Classification:

H04L 12/931
H04L 12/00
H04L 12/26

Abstract:

A synchronous packet-processing pipeline whose data paths are populated with data-plane stateful processing units (DSPUs) is provided. A DSPU is a programmable processor whose operations are synchronous with the dataflow of the packet-processing pipeline. A DSPU performs every computation with fixed latency. Each DSPU is capable of maintaining a set of states and perform its computations based on its maintained set of states. The programming of a DSPU determines how and when the DSPU updates one of its maintained states. Such programming may configure the DSPU to update the state based on its received packet data, or to change the state regardless of the received packet data.