Michael W Hargrove

US Patent:

20130248985, Sep 26, 2013

Filed:

Mar 26, 2012

Appl. No.:

13/429787

Inventors:

Kuldeep Amarnath - San Jose CA, US
Michael Hargrove - Clinton Corners NY, US
Srikanth Samavedam - Fishkill NY, US

Assignee:

GLOBALFOUNDRIES INC. - Grand Cayman

International Classification:

H01L 29/78
H01L 21/336

US Classification:

257330, 438270, 257E2141, 257E29262

Abstract:

Disclosed herein are various methods of forming replacement gate structures with a recessed channel region. In one example, the method includes forming a sacrificial gate structure above a semiconducting substrate, removing the sacrificial gate structure to thereby define an initial gate opening having sidewalls and to expose a surface of the substrate and performing an etching process on the exposed surface of the substrate to define a recessed channel in the substrate. The method includes the additional steps of forming a sidewall spacer within the initial gate opening on the sidewalls of the initial gate opening to thereby define a final gate opening and forming a replacement gate structure in the final gate opening.