Michael T Lockard

US Patent:

7878385, Feb 1, 2011

Filed:

Oct 30, 2007

Appl. No.:

11/929539

Inventors:

Ananda H. Kumar - Fremont CA, US
Ezekiel J. J. Kruglick - San Diego CA, US
Adam L. Cohen - Los Angeles CA, US
Kieun Kim - Pasadena CA, US
Gang Zhang - Monterey Park CA, US
Richard T. Chen - Burbank CA, US
Christopher A. Bang - San Diego CA, US
Vacit Arat - La Canada Flintridge CA, US
Michael S. Lockard - Lake Elizabeth CA, US
Uri Frodis - Los Angeles CA, US
Pavel B. Lembrikov - Santa Monica CA, US
Jeffrey A. Thompson - Los Angeles CA, US

Assignee:

Microfabrica Inc. - Van Nuys CA

International Classification:

B23K 31/02

US Classification:

22818022, 228215

Abstract:

Embodiments of invention are directed to the formation of microprobes (i. e. compliant electrical or electronic contact elements) on a temporary substrate, dicing individual probe arrays, and then transferring the arrays to space transformers or other permanent substrates. Some embodiments of the invention transfer probes to permanent substrates prior to separating the probes from a temporary substrate on which the probes were formed while other embodiments do the opposite. Some embodiments, remove sacrificial material prior to transfer while other embodiments remove sacrificial material after transfer. Some embodiments are directed to the bonding of first and second electric components together using one or more solder bumps with enhanced aspect ratios (i. e. height to width ratios) obtained as a result of surrounding the bumps at least in part with rings of a retention material. The retention material may act be a solder mask material.

US Patent:

20060108678, May 25, 2006

Filed:

Jun 30, 2005

Appl. No.:

11/173241

Inventors:

Ananda Kumar - Fremont CA, US
Ezekiel Kruglick - San Diego CA, US
Adam Cohen - Los Angeles CA, US
Kieun Kim - Pasadena CA, US
Gang Zhang - Monterey Park CA, US
Richard Chen - Burbank CA, US
Christopher Bang - San Diego CA, US
Vacit Arat - La Canada Flintridge CA, US
Michael Lockard - Lake Elizabeth CA, US
Uri Frodis - Los Angeles CA, US
Pavel Lembrikov - Santa Monica CA, US
Jeffrey Thompson - Los Angeles CA, US

International Classification:

H01L 23/48

US Classification:

257690000

Abstract:

Embodiments of invention are directed to the formation of microprobes (i.e. compliant electrical or electronic contact elements) on a temporary substrate, dicing individual probe arrays, and then transferring the arrays to space transformers or other permanent substrates. Some embodiments of the invention transfer probes to permanent substrates prior to separating the probes from a temporary substrate on which the probes were formed while other embodiments do the opposite. Some embodiments, remove sacrificial material prior to transfer while other embodiments remove sacrificial material after transfer. Some embodiments are directed to the bonding of first and second electric components together using one or more solder bumps with enhanced aspect ratios (i.e. height to width ratios) obtained as a result of surrounding the bumps at least in part with rings of a retention material. The retention material may act be a solder mask material.

US Patent:

20080050524, Feb 28, 2008

Filed:

Apr 9, 2007

Appl. No.:

11/733195

Inventors:

Ananda Kumar - Fremont CA, US
Jorge Albarran - Santa Clarita CA, US
Adam Cohen - Van Nuys CA, US
Kieun Kim - Van Nuys CA, US
Michael Lockard - Lake Elizabeth CA, US
Uri Frodis - Los Angeles CA, US
Dennis Smalley - Newhall CA, US

International Classification:

B05D 1/38
B05D 3/00

US Classification:

427289000, 427331000

Abstract:

Electrochemical fabrication processes and apparatus for producing single layer or multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers includes operations for reducing stress and/or curvature distortion when the structure is released from a sacrificial material which surrounded it during formation and possibly when released from a substrate on which it was formed. Six primary groups of embodiments are presented which are divide into eleven primary embodiments. Some embodiments attempt to remove stress to minimize distortion while others attempt to balance stress to minimize distortion.

US Patent:

20080105355, May 8, 2008

Filed:

Oct 30, 2007

Appl. No.:

11/929597

Inventors:

Ananda Kumar - Fremont CA, US
Ezekiel Kruglick - San Diego CA, US
Adam Cohen - Los Angeles CA, US
Kieun Kim - Pasadena CA, US
Gang Zhang - Monterey Park CA, US
Richard Chen - Burbank CA, US
Christopher Bang - San Diego CA, US
Vacit Arat - La Canada Flintridge CA, US
Michael Lockard - Lake Elizabeth CA, US
Uri Frodis - Los Angeles CA, US
Pavel Lembrikov - Santa Monica CA, US
Jeffrey Thompson - Los Angeles CA, US

International Classification:

B32B 37/00
B23K 31/02

US Classification:

156060000, 228180220, 029592100

Abstract:

Embodiments of invention are directed to the formation of microprobes (i.e. compliant electrical or electronic contact elements) on a temporary substrate, dicing individual probe arrays, and then transferring the arrays to space transformers or other permanent substrates. Some embodiments of the invention transfer probes to permanent substrates prior to separating the probes from a temporary substrate on which the probes were formed while other embodiments do the opposite. Some embodiments, remove sacrificial material prior to transfer while other embodiments remove sacrificial material after transfer. Some embodiments are directed to the bonding of first and second electric components together using one or more solder bumps with enhanced aspect ratios (i.e. height to width ratios) obtained as a result of surrounding the bumps at least in part with rings of a retention material. The retention material may act be a solder mask material.

US Patent:

20120222960, Sep 6, 2012

Filed:

Mar 1, 2012

Appl. No.:

13/409950

Inventors:

Ananda H. Kumar - Fremont CA, US
Jorge Sotelo Albarran - Santa Clarita CA, US
Adam L. Cohen - Van Nuys CA, US
Kieun Kim - Pasadena CA, US
Michael S. Lockard - Lake Elizabeth CA, US
Uri Frodis - Los Angeles CA, US
Dennis R. Smalley - Newhall CA, US

International Classification:

C25D 5/02

US Classification:

205135

Abstract:

Electrochemical fabrication processes and apparatus for producing single layer or multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers includes operations for reducing stress and/or curvature distortion when the structure is released from a sacrificial material which surrounded it during formation and possibly when released from a substrate on which it was formed. Six primary groups of embodiments are presented which are divide into eleven primary embodiments. Some embodiments attempt to remove stress to minimize distortion while others attempt to balance stress to minimize distortion.

US Patent:

20160194774, Jul 7, 2016

Filed:

Jan 5, 2016

Appl. No.:

14/988569

Inventors:

- Los Angeles CA, US
Ananda H. Kumar - Fremont CA, US
Michael S. Lockard - Lake Elizabeth CA, US
Dennis R. Smalley - Newhall CA, US

International Classification:

C25D 1/00
C23C 18/31
C23C 14/34
C23C 18/16
C25D 5/02
C25D 5/10

Abstract:

Some embodiments of the invention are directed to electrochemical fabrication of microprobes which are formed from a core material and a material that partially coats the surface of the probe. Other embodiments are directed to the electrochemical fabrication of microprobes which are formed from a core material and a material that completely coats the surface of each layer from which the probe is formed including interlayer regions. These first two groups of embodiments incorporate both the core material and the coating material during the formation of each layer. Still other embodiments are directed to the electrochemical fabrication of microprobe arrays that are partially encapsulated by a dielectric material during a post layer formation coating process. In even further embodiments, the electrochemical fabrication of microprobes from two or more materials may occur by incorporating a coating material around each layer of the structure without locating the coating material in inter-layer regions.

US Patent:

20150021190, Jan 22, 2015

Filed:

Jul 16, 2014

Appl. No.:

14/333458

Inventors:

Gregory P. SCHMITZ - Los Gatos CA, US
Michael S. LOCKARD - Lake Elizabeth CA, US
Ming-Ting WU - Northridge CA, US
Eric C. MILLER - Los Gatos CA, US
Adam L. COHEN - Los Angeles CA, US

International Classification:

C25D 1/00

US Classification:

205 50

Abstract:

A counterfeiting deterrent device according to one implementation of the disclosure includes a plurality of layers formed by an additive process. Each of the layers may have a thickness of less than 100 microns. At least one of the layers has a series of indentations formed in an outer edge of the layer such that the indentations can be observed to verify that the device originated from a predetermined source. According to another implementation, a counterfeiting deterrent device includes at least one raised layer having outer edges in the shape of a logo. A light source is configured and arranged to shine a light through a slit in a substrate layer of the device and past an intermediate layer to light up the outer edge of the raised layer. The layers of the device are formed by an additive process and have a thickness of less than 100 microns each.