Michael Ray Reeder

US Patent:

44140576, Nov 8, 1983

Filed:

Dec 3, 1982

Appl. No.:

6/446597

Inventors:

Ronald R. Bourassa - Colorado Springs CO
Michael R. Reeder - Colorado Springs CO

Assignee:

Inmos Corporation - Colorado Springs CO

International Classification:

H01L 21306
C03C 1500
B44C 122
C23F 102

US Classification:

156643

Abstract:

A process is described for anisotropically etching semiconductor products which include a lower dielectric layer, an intermediate polysilicon layer, and an upper silicide layer such as titanium silicide. A pattern-defining layer will normally overlie the silicide layer to define target areas to be etched. In a first step, the silicide is etched through using Freon 115 chloro, pentafluoroethane (C. sub. 2 ClF. sub. 5) in a plasma etching chamber conditioned to provide a reactive ion etch. The etch is completed in the same chamber using a second gas which includes an amount of Cl. sub. 2 selected to etch anisotropically through the polysilicon layer without substantially etching the dielectric layer. Preferably, both etches occur after covering inner surfaces of the etching chamber with a material which releases molecules of the character included in the pattern-defining layer, such as Kapton, a polymide, in the disclosed example.

US Patent:

57598762, Jun 2, 1998

Filed:

Nov 1, 1995

Appl. No.:

8/551588

Inventors:

Scott G. Singlevich - Colorado Springs CO
Bradley S. Holway - Colorado Springs CO
Kurt D. Humphrey - Colorado Springs CO
Brian Scott Poarch - Colorado Springs CO
Michael R. Reeder - Colorado Springs CO
Neal J. Verzwyvelt - Colorado Springs CO

Assignee:

United Technologies Corporation - Windsor Locks CT

International Classification:

H01L 2182

US Classification:

438131

Abstract:

An antifuse includes a metal cap layer located at the second barrier layer of the antifuse to improve the antifuse yield and long term reliability. An antifuse further includes one or more interfacial oxide film layers surrounding an antifuse dielectric layer to provide narrowing of the antifuse programming voltage distribution and to further improve the antifuse yield and long term reliability.

US Patent:

48351180, May 30, 1989

Filed:

Mar 23, 1987

Appl. No.:

7/029192

Inventors:

Robert E. Jones - Colorado Springs CO
Lee Kammerdiner - Avondale CO
Michael R. Reeder - Colorado Springs CO

Assignee:

INMOS Corporation - Colorado Springs CO

International Classification:

H01L 21265

US Classification:

437173

Abstract:

A process of manufacturing selectively restructurable conductive links between circuit elements and corresponding spare elements on a semiconductor. A continuous green light laser directed at a non-conductive amorphous region in the links causes the region to recrystallize. This makes the link electrically conductive thereby joining the circuit elements to a corresponding spare element on the semiconductor. The method permits for high density packing of circuit elements and creates a link without producing bulk material movement.