Michael W Regan

US Patent:

6336713, Jan 8, 2002

Filed:

Jul 29, 1999

Appl. No.:

09/364278

Inventors:

Michael J. Regan - Corvallis OR
Marzio Leban - Corvallis OR

Assignee:

Hewlett-Packard Company - Palo Alto CA

International Classification:

B41J 205

US Classification:

347 62, 347 63, 347 64

Abstract:

A high efficiency thermal inkjet printhead which uses a novel resistor system. The printhead includes a support structure, at least one layer of material which comprises at least one opening therethrough, and at least one ink expulsion resistor located within the printhead between the support structure and the layer of material having the opening therein. The resistor is produced from at least one metal silicon nitride composition. Numerous benefits are achieved by this development including (A) reduced resistor current consumption and greater energy efficiency; (B) increased bulk resistivity of the resistor elements compared with prior systems; (C) cooler printhead operation; (D) multiple economic benefits including the ability to use lesscostly, high voltage/low current power supplies; and (E) improved reliability, stability, and longevity levels in connection with the printhead and resistor elements.

US Patent:

6659596, Dec 9, 2003

Filed:

Sep 26, 1997

Appl. No.:

08/938346

Inventors:

Brian J. Keefe - La Jolla CA
Ali Emamjomeh - San Diego CA
Roger J. Kolodziej - Corvallis OR
Michael J. Regan - Corvallis OR
Harold Lee Van Nice - Corvallis OR

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

B41J 205

US Classification:

347 63

Abstract:

An ink-jet printhead is provided having a thin film substrate comprising a plurality of thin film layers; a plurality of ink firing heater resistors defined in said plurality of thin film layers; a polymer fluid barrier layer; and a carbon rich layer disposed on said plurality of thin film layers, for bonding said polymer fluid barrier layer to said thin film substrate.

US Patent:

6686642, Feb 3, 2004

Filed:

Jun 11, 2001

Appl. No.:

09/879876

Inventors:

Michael J. Regan - Corvallis OR
John Liebeskind - Corvallis OR
Charles C. Haluzak - Corvallis OR

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

H01L 2900

US Classification:

257521, 438456, 438107

Abstract:

An integrated circuit includes a substrate having an etched surface and a non-etched surface. The etched surface contains circuit elements and the non-etched surface contains a bonding surface. The non-etched surface is located at a predetermined height from the etched surface. Bonding this integrated circuit with another substrate creates a wide-gap between the substrates that is preferably evacuated and hermetically sealed.

US Patent:

6741016, May 25, 2004

Filed:

Jun 14, 2001

Appl. No.:

09/882933

Inventors:

Paul J. Benning - Corvallis OR
William R Knight - Corvallis OR
Michael J. Regan - Corvallis OR

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

H01J 146

US Classification:

313309, 313306, 313307, 313308, 313310, 313312, 313313, 313293, 313495, 313496, 313497, 313498, 3151691, 3151694, 315167, 445 24, 445 47

Abstract:

An electron lens is used for focusing electrons from a cathode to an anode. The lens includes a first conductive layer with a first opening at a first distance from the cathode. The first conductive layer is held at a first voltage. The lens also includes a second conductive layer with a second opening at a second distance from the first conductive layer and a third distance from the anode. The second conductive layer is held at a second voltage substantially equal to the voltage of the anode. The first and second openings are chosen based on the first voltage, the second voltage, the first distance, the second distance and the third distance. The opening focuses the electrons emitted from the cathode onto the anode to a spot size preferably less than 40 nanometers. The force created between the cathode and anode is minimized by the structure of the lens.

US Patent:

6753544, Jun 22, 2004

Filed:

Apr 30, 2001

Appl. No.:

09/846047

Inventors:

Zhizhang Chen - Corvallis OR
Michael David Bice - Corvallis OR
Ronald L. Enck - Corvallis OR
Michael J. Regan - Corvallis OR
Thomas Novet - Corvallis OR
Paul J. Benning - Corvallis OR

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

H01L 2906

US Classification:

257 10, 257 11, 257163

Abstract:

An emitter has an electron supply layer and a silicon-based dielectric layer formed on the electron supply layer. The silicon-based dielectric layer is preferably less than about 500 Angstroms. Optionally, an insulator layer is formed on the electron supply layer and has openings defined within which the silicon-based dielectric layer is formed. A cathode layer is formed on the silicon-based dielectric layer to provide a surface for energy emissions of electrons and/or photons. Preferably, the emitter is subjected to an annealing process thereby increasing the supply of electrons tunneled from the electron supply layer to the cathode layer.

US Patent:

6781146, Aug 24, 2004

Filed:

Apr 30, 2001

Appl. No.:

09/846127

Inventors:

Zhizhang Chen - Corvallis OR
Michael J. Regan - Corvallis OR
Brian E Bolf - Albany OR
Thomas Novet - Corvallis OR
Paul J. Benning - Lexington MA
Mark Alan Johnstone - Lebanon OR
Sriram Ramamoorthi - Corvallis OR

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

H01L 2906

US Classification:

257 10, 257 11, 257163

Abstract:

An emitter has an electron supply layer and a tunneling layer formed on the electron supply layer. Optionally, an insulator layer is formed on the electron supply layer and has openings defined within which the tunneling layer is formed. A cathode layer is formed on the tunneling layer to provide a surface for energy emissions of electrons and/or photons. Preferably, the emitter is subjected to an annealing process thereby increasing the supply of electrons tunneled from the electron supply layer to the cathode layer.

US Patent:

6804137, Oct 12, 2004

Filed:

Jun 12, 2003

Appl. No.:

10/461632

Inventors:

Michael J. Regan - Corvallis OR

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

G11C 1300

US Classification:

365106, 365113, 365163

Abstract:

A re-recordable data storage medium of one embodiment includes a substrate layer, a phase-changeable layer, and an intermediate layer. The substrate layer has a semiconductor type selected from p-type and n-type. The phase-changeable layer has a first phase corresponding to a first storable logical value, and a second phase corresponding to a second storable logical value. The phase-changeable layer has a semiconductor type identical to that of the substrate layer. The intermediate layer is between the phase-changeable layer and the substrate layer, and has a semiconductor type opposite to that of the phase-changeable and substrate layer. The substrate, phase-changeable, and intermediate layers act as a transistor under selective illumination of the phase-changeable layer.

US Patent:

6835947, Dec 28, 2004

Filed:

Jan 31, 2002

Appl. No.:

10/066158

Inventors:

Alexander Govyadinov - Corvallis OR
Michael J. Regan - Corvallis OR

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

H01L 2906

US Classification:

257 10, 313310

Abstract:

An emitter includes an electron source and a cathode. The cathode has an emissive surface. The emitter further includes a continuous anisotropic conductivity layer disposed between the electron source and the emissive surface of the cathode. The anisotropic conductivity layer has an anisotropic sheet resistivity profile and provides for substantially uniform emissions over the emissive surface of the emitter.