Michael K Terry

US Patent:

7503084, Mar 17, 2009

Filed:

Feb 25, 2005

Appl. No.:

11/066411

Inventors:

Michael Norman Terry - Southlake TX, US

International Classification:

A47C 19/00
A47D 7/00
A47C 31/00
A47C 23/00

US Classification:

5 8, 5 11, 5310, 52001, 5307

Abstract:

A mattress leveling system designed to provide individually adjustable mattress heights, where mattresses of different firmness and thickness can be integrated into one bed with a level sleep surfaces sharing a common plane and held juxtaposed. Each mattress or mattress set is securely supported within a frame assembly with independently height adjustable legs. Users can integrate individual mattresses, which provide adequate firmness to meet the needs and desires of each of the users, forming one bed system customized to provide optimal comfort for both partners. An advantage of this design provides users with the ability to integrate into one bed, commonly available standard or non-standard adult size mattresses of differing thickness from different manufacturers, taking advantage of the latest sleep comfort technologies available on the market. Another advantage is the ability to exchange one mattress of the integrated bed without affecting the other mattress. Further advantages are, the ability to level the mattresses on uneven flooring, and the ability to integrate an unlimited number of mattresses into one bed.

US Patent:

44450028, Apr 24, 1984

Filed:

Dec 28, 1981

Appl. No.:

6/335144

Inventors:

Michael B. Terry - Denton TX

Assignee:

Mostek Corporation - Carrollton TX

International Classification:

H04M 158
H04B 158

US Classification:

179 81A

Abstract:

A sidetone circuit (44) is connected to the terminals of a two-line telephone system. The sidetone circuit (44) receives inputs from a DTMF source (62) and a microphone (72). These inputs are selectively passed through a circuit (82) to produce a modulating signal which controls a current source (46) and a current (54). The current source (46) is connected between the telephone line terminals. The input audio signal from the microphone (72) modulates the current source (46) to impress a voltage upon the telephone line. The current source (54) is connected between a first of the telephone lines and a balance node (60). A resistor (58) is connected between the balance node and the second of the telephone lines. An incoming audio signal over the telephone line is coupled to the balance node (60) for summing with an inverted audio signal. The input audio signal from the microphone (72) is further coupled to the balance node (60).

US Patent:

44081537, Oct 4, 1983

Filed:

Dec 28, 1981

Appl. No.:

6/335147

Inventors:

Michael B. Terry - Denton TX

Assignee:

Mostek Corporation - Carrollton TX

International Classification:

G05F 320

US Classification:

323224

Abstract:

A current supplementation circuit is designed to operate in conjunction with a two-terminal telephone line for supplying additional current to the output of a voltage regulator (42). A nonregulated voltage is received at first and second terminals (18, 20) with the nonregulated voltage comprising both DC and AC signals. An essentially regulated voltage is produced at a terminal (12) at the output of the voltage regulator (42). An essentially constant current is drawn from the first terminal (41) and provided to the second terminal (20) to provide an indication that the subscriber circuit is active. This constant current comprises first and second partial currents. The first partial current is passed through a control transistor (98) through a parasitic collector to the second terminal (14). The second partial current is passed through the control transistor (98) to the regulated voltage terminal (12) when the voltage at this terminal drops. The current supplementation circuit serves to bypass the voltage regulator (42) and supply additional current to the voltage regulated node when the voltage at that node drops below its intended level.

US Patent:

44530374, Jun 5, 1984

Filed:

Dec 28, 1981

Appl. No.:

6/335142

Inventors:

Michael B. Terry - Denton TX

Assignee:

Mostek Corporation - Carrollton TX

International Classification:

H04B 336

US Classification:

179 16F

Abstract:

A compensation circuit (10) controls the gain of transmit and receive amplifiers (47), (49) as a function of a residual input current (I. sub. res). Circuit (10) includes a constant current source (24) which is connected to produce mirrored constant currents in transistors (26) and (28). The residual current is passed through a resistor (R. sub. loop) to produce a reference voltage. The constant current from the transistor (26) is divided with the first part of the current passing through the resistor (R. sub. loop) and the second part of the current passing through a resistor (50) and a transistor (54). The transistor (54) is connected in a mirror configuration with a transistor (58). When the residual current increases, the current mirrored to transistor (58) decreases. A transistor (32) is connected in parallel with the transistor (58) to receive the remaining current from the transistor (28) which is not drawn by the transistor (58).

US Patent:

43862810, May 31, 1983

Filed:

Jan 15, 1981

Appl. No.:

6/273841

Inventors:

Michael B. Terry - Dallas TX

Assignee:

Mostek Corporation - Carrollton TX

International Classification:

H03K 1708

US Classification:

307200B

Abstract:

A circuit (10) is provided for use in a telecommunications integrated circuit which has a memory for storing a telephone number. The circuit (10) essentially comprises a latch having differential nodes (22, 28). The circuit (10) serves to detect when the supply voltage provided between the supply terminals (12, 14) drops to a level which causes loss of the data stored in the integrated circuit memory. An output signal (PUC) is driven to a low state upon detection of loss of power. For a slow return of supply power the nodes (22, 28) are respectively pulled to low and high states by current leakage through diodes (30, 36, 38) connected to the power terminals (12, 14). For a rapid supply voltage transition the latch node (28) is pulled high by capacitive coupling through a diode (30). This serves to set the latch in the condition where the output node (22) is at a low state to indicate loss of power. After generation of the PUC signal in the low state, external circuitry provides a reset signal (. phi. sub.

US Patent:

44396376, Mar 27, 1984

Filed:

Dec 28, 1981

Appl. No.:

6/335145

Inventors:

Michael B. Terry - Denton TX

Assignee:

Mostek Corporation - Carrollton TX

International Classification:

H04B 336

US Classification:

179 16F

Abstract:

A low loop current switch latch circuit (10) monitors a residual current which is derived from a telephone line and is proportional to the current drawn by a telephone subscriber circuit. Bipolar transistors (20, 26) are connected to produce a proportional current to the residual current. A current mirror circuit includes a master transistor (30) and a slave transistor (32). The proportional current is drawn through the master transistor (30). The current produced by the slave transistor (32) is provided to a node (33). A constant power source (36) provides a constant current to a node (39). A pair of cross-coupled transistors (40, 46) are connected to the nodes (33, 39) such that the cross-coupled transistors are set to first and second states as a function of the current derived from the slave transistor (32). A bias current transistor (52) is activated by the cross-coupled transistors (40, 46) to draw a preset biased current from an amplifier (60), thereby changing the amplifier from a first gain to a second gain condition. The circuit (10) therefor sets the gain of the amplifier (60) through switching action utilizing hysteresis, the switching being a function of the amplitude of the residual current passed through the transistor (20).

US Patent:

44790970, Oct 23, 1984

Filed:

Dec 24, 1981

Appl. No.:

6/270528

Inventors:

David N. Larson - Carrollton TX
Jeffrey Ireland - Farmers Branch TX
Michael B. Terry - Carrollton TX

Assignee:

Mostek Corporation - Carollton TX

International Classification:

H03K 450

US Classification:

331111

Abstract:

A resistor-capacitor oscillator circuit (10) is provided and includes a voltage comparator circuit (12). A capacitor (20) is connected to an input terminal (14) of the voltage comparator circuit (12). A resistor divider network (30) is coupled to an input terminal (16) of the voltage comparator circuit (12) for generating a reference voltage. A delay circuit (50, 52) is coupled to an output terminal (42) of the voltage comparator circuit (12). A discharge device (54) is coupled to the delay circuit (50, 52) and to the capacitor (20) for discharging the capacitor (20). A switching device (40) is coupled to the output (42) of the voltage comparator circuit (12) and to the resistor divider network (30) for controlling the application of the reference voltage to voltage comparator circuit (12).

US Patent:

43596800, Nov 16, 1982

Filed:

May 18, 1981

Appl. No.:

6/278905

Inventors:

James R. Hellums - Carrollton TX
Michael B. Terry - Dallas TX

Assignee:

Mostek Corporation - Carrollton TX

International Classification:

G05F 320

US Classification:

323313

Abstract:

A voltage reference circuit (10) produces a reference voltage at output terminals (66, 76). The output reference voltage is substantially independent of variations in the supply voltage, integrated circuit manufacturing processes and temperature. A current reference circuit (30, 32, 34, 36, 38, 56 and 84) produces constant emitter currents in bipolar transistors (40, 70). The V. sub. BE of the bipolar transistors (40, 70) is a stable reference due to the constant emitter current. The bipolar transistors (40, 70) are manufactured with similar geometries to eliminate dependence of the reference voltage upon bipolar processing variations. The V. sub. BE of the bipolar transistor (40) produces a reference current which is provided to the base terminal of bipolar transistor (70). The V. sub. BE of bipolar transistor (70) is further utilized to produce the output reference voltage. A temperature stabilization circuit (58, 82, 86, 90, 92 and 94) is provided with an opposite temperature coefficient from that of the bipolar transistors (40, 70).