Michael M Wang

US Patent:

7114134, Sep 26, 2006

Filed:

May 27, 2004

Appl. No.:

10/856732

Inventors:

Xiaonan Zhang - Palo Alto CA, US
Michael Xiaonan Wang - Stanford CA, US

Assignee:

Veri Silicon Holdings, Co. LTD - Santa Clara CA

International Classification:

G06F 17/50

US Classification:

716 3, 716 1, 716 2, 716 4

Abstract:

A simple, approximate power optimization in connection with automatic large scale circuit design using a cell library is provided. The cell library of the present invention provides active region information for each cell, and preferably also provides conventional parameters such as cell physical area and cell performance information. Typically, several cells having differing parameters correspond to each cell function provided by the library. A cost function is defined which depends on active region information, and can also depend on physical area and performance. A cell design including cells selected from the library is optimized by substitution of functionally equivalent cells from the library to minimize the cost function. Minimization of active region area provides a simple way to approximately minimize power consumption. Optionally, a second optimization can be performed with a higher fidelity power model using the approximately power-minimized design as a starting point.

US Patent:

7254802, Aug 7, 2007

Filed:

May 27, 2004

Appl. No.:

10/856345

Inventors:

Xiaonan Zhang - Palo Alto CA, US
Michael Xiaonan Wang - Stanford CA, US

Assignee:

VeriSilicon Holdings, Co. Ltd. - Santa Clara CA

International Classification:

G06F 17/50

US Classification:

716 17, 716 1, 716 2, 716 3, 716 6, 716 9, 716 10

Abstract:

A cell library which enables reduced quantization over-design in large scale circuit design is provided. Library cells having the same cell function have drive strengths selected to provide delays about equal to a predetermined set of design delays, at a nominal load corresponding to the cell function. In contrast, conventional cell libraries typically have drive strengths which correspond to a predetermined set of cell physical areas. Preferably, the spacing between adjacent design delays is a non-decreasing function of cell drive strength. Such spacing reduces quantization induced over-design compared to conventional cell libraries which have a design delay spacing that is a decreasing function of cell drive strength.

US Patent:

7426710, Sep 16, 2008

Filed:

Nov 15, 2005

Appl. No.:

11/273839

Inventors:

Xiaonan Zhang - Palo Alto CA, US
Michael Xiaonan Wang - Stanford CA, US

Assignee:

VeriSilicon Holdings, Co. Ltd. - Santa Clara CA

International Classification:

G06F 17/50

US Classification:

716 17, 716 3, 716 6, 716 9, 716 10

Abstract:

A cell library which enables reduced quantization over-design in large scale circuit design is provided. Library cells having the same cell function have drive strengths selected to provide delays about equal to a predetermined set of design delays, at a nominal load corresponding to the cell function. In contrast, conventional cell libraries typically have drive strengths which correspond to a predetermined set of cell physical areas. Preferably, the spacing between adjacent design delays is a non-decreasing function of cell drive strength. Such spacing reduces quantization induced over-design compared to conventional cell libraries which have a design delay spacing that is a decreasing function of cell drive strength. On-chip clock distribution is an important application where cell libraries of the invention can provide significant advantages.

US Patent:

8601498, Dec 3, 2013

Filed:

May 27, 2011

Appl. No.:

13/117791

Inventors:

Lawrence A. Laurich - Sunnyvale CA, US
Stephen Paul Sample - Saratoga CA, US
Michael H. Wang - Hillsborough CA, US
Babu Rao Kandimalla - San Jose CA, US
Rick L. Orsini - Flower Mound TX, US
Mark S. O'Hare - Coto De Caza CA, US
Don Martin - Atlantic Beach FL, US
Steven Mark Casselman - Santa Clara CA, US

Assignee:

Security First Corp. - Rancho Santa Margarita CA

International Classification:

G06F 9/44
G06F 12/16

US Classification:

719326, 711114

Abstract:

Data processing and an accelerator system therefore are described. An embodiment relates generally to a data processing system. In such an embodiment, a bus and an accelerator are coupled to one another. The accelerator has an application function block. The application function block is to process data to provide processed data to storage. A network interface is coupled to obtain the processed data from the storage for transmission.

US Patent:

20040100456, May 27, 2004

Filed:

Nov 21, 2002

Appl. No.:

10/302389

Inventors:

Michael Wang - Morganville NJ, US

International Classification:

G09G005/00

US Classification:

345/179000

Abstract:

A pen-like apparatus is used to rotate a computer mouse ball. The pen-like apparatus may be comprised of a plurality of balls, wherein the rotation of the balls controls the movement of a computer cursor on a computer monitor. A device may be provided for substantially fixing a computer mouse at a location. A device may be provided for rotating a ball of the computer mouse, while the computer mouse is substantially fixed at the location. A computer keyboard is also provided comprising a typing area, an area in which a computer mouse can be fixed in a location, the computer mouse including a ball, and an area which is responsive to the movement of an implement so that the movement of the implement causes movement of the ball of the computer mouse and thereby controls a computer cursor on a computer monitor.

US Patent:

20040101310, May 27, 2004

Filed:

Oct 6, 2003

Appl. No.:

10/679525

Inventors:

Michael Wang - Morganville NJ, US

International Classification:

H04B010/00

US Classification:

398/140000

Abstract:

The present invention, in one or more embodiments, provides an apparatus comprising an optical transmitter and an optical receiver located in a pen shaped housing. The apparatus may be further comprised of a processor. The optical transmitter may send out optical signals toward a surface and the optical receiver may receive the optical signals reflected off of the surface. The processor may process the optical signals received by the optical receiver to determine the location or movement of the pen shaped housing.

US Patent:

20050278659, Dec 15, 2005

Filed:

May 27, 2004

Appl. No.:

10/857164

Inventors:

Xiaonan Zhang - Palo Alto CA, US
Michael Wang - Stanford CA, US

International Classification:

G06F017/50

US Classification:

716001000

Abstract:

A simple, approximate power optimization in connection with automatic large scale circuit design using a cell library is provided. The cell library of the present invention provides active region information for each cell, and preferably also provides conventional parameters such as cell physical area and cell performance information. Typically, several cells having differing parameters correspond to each cell function provided by the library. A cost function is defined which depends on active region information, and can also depend on physical area and performance. A cell design including cells selected from the library is optimized by substitution of functionally equivalent cells from the library to minimize the cost function. Minimization of active region area provides a simple way to approximately minimize power consumption. Optionally, a second optimization can be performed with a higher fidelity power model using the approximately power-minimized design as a starting point.

US Patent:

20110155208, Jun 30, 2011

Filed:

Jun 25, 2009

Appl. No.:

12/999048

Inventors:

Michael Wang - Sunnyvale CA, US

International Classification:

H01L 31/042
H01L 31/18
H01L 31/06

US Classification:

136244, 438 84, 136255, 257E31015

Abstract:

A heterojunction photovoltaic device comprises a chemically-doped n-type semiconductor layer, a charge-blocking layer that can have a compositionally graded configuration, and a chemically-doped p-type semiconductor layer. The charge-blocking layer can significantly reduce interfacial recombination of electrons and holes, increase open circuit voltage (Voc), and increase overall photovoltaic device efficiency.