Michael Alan Waterman

US Patent:

56320418, May 20, 1997

Filed:

Nov 18, 1993

Appl. No.:

8/154633

Inventors:

John C. Peterson - Alta Loma CA
Edward T. Chow - San Dimas CA
Michael S. Waterman - Culver City CA
Timothy J. Hunkapillar - Pasadena CA

Assignee:

California Institute of Technology - Pasadena CA

International Classification:

G06F 1900

US Classification:

395800

Abstract:

A sequence information signal processing integrated circuit chip designed to perform high speed calculation of a dynamic programming algorithm based upon the algorithm defined by Waterman and Smith. The signal processing chip of the present invention is designed to be a building block of a linear systolic array, the performance of which can be increased by connecting additional sequence information signal processing chips to the array. The chip provides a high speed, low cost linear array processor that can locate highly similar global sequences or segments thereof such as contiguous subsequences from two different DNA or protein sequences. The chip is implemented in a preferred embodiment using CMOS VLSI technology to provide the equivalent of about 400,000 transistors or 100,000 gates. Each chip provides 16 processing elements, and is designed to provide 16 bit, two's compliment operation for maximum score precision of between -32,768 and +32,767. It is designed to provide a comparison between sequences as long as 4,194,304 elements without external software and between sequences of unlimited numbers of elements with the aid of external software.

US Patent:

59648600, Oct 12, 1999

Filed:

Apr 8, 1997

Appl. No.:

8/831798

Inventors:

John C. Peterson - Alta Loma CA
Edward T. Chow - San Dimas CA
Michael S. Waterman - Culver City CA
Timothy J. Hunkapillar - Pasadena CA

Assignee:

California Institute of Technology - Pasadena CA

International Classification:

G06F 1900

US Classification:

712 19

Abstract:

An electronic circuit is used to compare two sequences, such as genetic sequences, to determine which alignment of the sequences produces the greatest similarity. The circuit includes a linear array of series-connected processors, each of which stores a single element from one of the sequences and compares that element with each successive element in the other sequence. For each comparison, the processor generates a scoring parameter that indicates which segment ending at those two elements produces the greatest degree of similarity between the sequences. The processor uses the scoring parameter to generate a similar scoring parameter for a comparison between the stored element and the next successive element from the other sequence. The processor also delivers the scoring parameter to the next processor in the array for use in generating a similar scoring parameter for another pair of elements. The electronic circuit determines which processor and alignment of the sequences produce the scoring parameter with the highest value.