Michael B Watts

US Patent:

20220270930, Aug 25, 2022

Filed:

May 3, 2022

Appl. No.:

17/735476

Inventors:

- Austin TX, US
Akhila Mallavarapu - Philadelphia PA, US
Jaydeep Kulkarni - Austin TX, US
Michael Watts - Austin TX, US
Sanjay Banerjee - Austin TX, US

International Classification:

H01L 21/8234
H01L 29/786
H01L 29/66
H01L 27/088
H01L 27/11
H01L 21/3065
H01L 29/423
H01L 21/306

Abstract:

A method for fabricating a three-dimensional (3D) static random-access memory (SRAM) architecture using catalyst influenced chemical etching (CICE). Utilizing CICE, semiconductor fins can be etched with no etch taper, smooth sidewalls and no maximum height limitation. CICE enables stacking of as many nanosheet layers a desired and also enables a 3D stacked architecture for SRAM cells. Furthermore, CICE can be used to etch silicon waveguides thereby creating waveguides with smooth sidewalls to improve transmission efficiency and, for photon-based quantum circuits, to eliminate charge fluctuations that may affect photon indistinguishability.