Mitchell A Mccarthy

age ~42

from Rio Rancho, NM

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Also known as:

Mitchell Andrea Mccarthy
Mitchell Austin Mccarthy
Michell Mccarthy
Mitchell Mc Carthy
Mitchell Mc
Mc Mitchell

Connected to:

Mitchell Mccarthy Phones & Addresses

Rio Rancho, NM
Durango, CO
Saratoga Springs, UT
Gainesville, FL
2519 Bordeaux Way, Lutz, FL 33559 • (813)9494139

Work

Company:

Hall Estill
Address:

Specialities

Intellectual Property • Patent Office Practice • Patent Licensing • Patent Litigation • Trademarks • Copyrights

Lawyers & Attorneys

Mitchell Mccarthy - Lawyer

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Office:

Hall Estill

Specialties:

Intellectual Property
Patent Office Practice
Patent Licensing
Patent Litigation
Trademarks
Copyrights

ISLN:

913063413

Admitted:

1999

University:

University of Oklahoma, B.S.M.E., 1985

Law School:

Oklahoma City University, J.D., 1999

Resumes

Freelance Musician

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Position:

Composer / Sound Designer - "Inside the Music" at New World Symphony, Co-Artistic Director at Kelly/McCarthy • Dance/Music, Adjunct Professor at Hofstra University, Associate Conductor / Production Manager at Gemini Youth Orchestras

Location:

New York, New York

Industry:

Music

Work:

New World Symphony - Miami/Fort Lauderdale Area since Jan 2013
Composer / Sound Designer - "Inside the Music"
Kelly/McCarthy • Dance/Music - Greater New York City Area since Jun 2012
Co-Artistic Director
Hofstra University since Feb 2012
Adjunct Professor
Gemini Youth Orchestras - Greater New York City Area since Mar 2011
Associate Conductor / Production Manager
Hofstra University - Greater New York City Area Sep 2012 - Dec 2012
Composer - Dance and Music Dept. Collaboration

Education:

Hofstra University 2006 - 2010
B.S., Music Theory, Composition

Skills:

Sibelius
Logic Pro
Music
Composition
Opera
Musical Theatre
Orchestration
String Arrangements
Piano
Studio Recording
Film Scoring
Dance Music
Conducting
Creative Services
Teamwork
Coffee
Photography
Adobe Creative Suite
Travel
Theatre
Pianist
Music Theory

Interests:

Cooking, Coffee Culture, Photography, Travel

Honor & Awards:

Dorothy B. Hoag Memorial Award & Scholarship William H. Lawrence Memorial Award & Scholarship Leonard D. Meyers Award for Outstanding Achievement Hofstra University Honors College Presidential Scholarship Connecticut Association of Schools Arts Award

Nvm Device Integ And Yield Engineer

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Location:

4324 Bentgrass Mdws northeast, Rio Rancho, NM

Industry:

Semiconductors

Work:

Intel Corporation
Nvm Device Integ and Yield Engineer
Nverpix Jan 2011 - Jan 2018
Co-Founder and Chief Strategy Officer
University of Florida Jan 1, 2011 - Jan 2018
Postdoctoral Associate
Intel Corporation 2004 - 2006
Process Engineering Intern

Education:

University of Florida 2006 - 2010
Doctorates, Doctor of Philosophy, Materials Science, Engineering

Skills:

Nanotechnology
Characterization
Thin Films
Materials Science
Semiconductors
Photolithography
Nanomaterials
Afm
Ald
Design of Experiments
Scanning Electron Microscopy
Organic Chemistry
Physics
Spectroscopy
Silicon
Social Media Marketing

Mitchell Mccarthy

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Location:

Iowa City, IA

Work:

Ford of Londonderry

Education:

University of Massachusetts Lowell

Us Patents

Contact Barrier Modulation Of Field Effect Transistors
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US Patent:

8564048, Oct 22, 2013
Filed:

Jun 21, 2012
Appl. No.:

13/528953
Inventors:

Andrew Gabriel Rinzler - Newberry FL, US
Bo Liu - Gainesville FL, US
Mitchell Austin McCarthy - Gainesville FL, US
John Robert Reynolds - Gainesville FL, US
Franky So - Gainesville FL, US
Assignee:

University of Florida Research Foundation, Inc. - Gainesville FL
International Classification:

H01L 29/76
H01L 29/94
H01L 31/062
H01L 31/113
H01L 31/119
US Classification:

257328, 257329, 257330, 257331, 257332, 257333, 257334, 257E21629, 257E21643, 257E27091, 257E27096, 257E29118, 257E29262, 257E29274, 257E29313, 257E29318
Abstract:

Embodiments of the invention relate to field effect transistors. The field effect transistor includes a gate electrode for providing a gate field, a first electrode including a conductive material having a low carrier density and a low density of electronic states, a second electrode, and a semiconductor. Contact barrier modulation includes barrier height lowering of a Schottky contact between the first electrode and the semiconductor. In some embodiments of the invention, a vertical field effect transistor employs an electrode comprising a conductive material with a low density of states such that the transistors contact barrier modulation comprises barrier height lowering of the Schottky contact between the electrode with a low density of states and the adjacent semiconductor by a Fermi level shift.

Nanotube Enabled, Gate-Voltage Controlled Light Emitting Diodes
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US Patent:

20100237336, Sep 23, 2010
Filed:

Sep 10, 2008
Appl. No.:

12/677457
Inventors:

Andrew Gabriel Rinzler - Newberry FL, US
Bo Liu - Gainesville FL, US
Mitchell Austin McCarthy - Gainesville FL, US
John Robert Reynolds - Gainesville FL, US
Franky So - Gainesville FL, US
Assignee:

UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INC. - Gainesville FL
International Classification:

H01L 51/30
H01L 51/54
US Classification:

257 40, 257E51018, 257E51005
Abstract:

Embodiments of the invention relate to vertical field effect transistor that is a light emitting transistor. The light emitting transistor incorporates a gate electrode for providing a gate field, a first electrode comprising a dilute nanotube network for injecting a charge, a second electrode for injecting a complementary charge, and an electroluminescent semiconductor layer disposed intermediate the nanotube network and the electron injecting layer. The charge injection is modulated by the gate field. The holes and electrons, combine to form photons, thereby causing the electroluminescent semiconductor layer to emit visible light. In other embodiments of the invention a vertical field effect transistor that employs an electrode comprising a conductive material with a low density of states such that the transistors contact barrier modulation comprises barrier height lowering of the Schottky contact between the electrode with a low density of states and the adjacent semiconductor by a Fermi level shift.

Semiconductor Devices Including An Electrically Percolating Source Layer And Methods Of Fabricating The Same
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US Patent:

20120319096, Dec 20, 2012
Filed:

Mar 4, 2011
Appl. No.:

13/580199
Inventors:

Andrew Gabriel Rinzler - Gainesville FL, US
Bo Liu - Gainesville FL, US
Mitchell Austin McCarthy - Gainesville FL, US
International Classification:

H01L 29/78
H01L 21/336
H01L 51/30
H01L 29/792
H01L 29/788
US Classification:

257 40, 257314, 257324, 257295, 257315, 438197, 438257, 257E29255, 257E293, 257E51025, 257E21409, 257E21422
Abstract:

Various embodiments are provided for semiconductor devices including an electrically percolating source layer and methods of fabricating the same. In one embodiment, a semiconductor device includes a gate layer, a dielectric layer, a memory layer, a source layer, a semiconducting channel layer, and a drain layer. The source layer is electrically percolating and perforated. The semiconducting channel layer is in contact with the source layer and the memory layer. The source layer and the semiconducting channel layer form a gate voltage tunable charge injection barrier.

Active Matrix Dilute Source Enabled Vertical Organic Light Emitting Transistor
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US Patent:

20130240842, Sep 19, 2013
Filed:

Dec 7, 2011
Appl. No.:

13/519176
Inventors:

Andrew Gabriel Rinzler - Gainesville FL, US
Mitchell Austin McCarthy - Gainesville FL, US
Bo Liu - Gainesville FL, US
International Classification:

H01L 51/52
H01L 29/78
US Classification:

257 40, 257 88, 257329, 977742
Abstract:

Various embodiments are provided for dilute source enabled vertical organic light emitting transistors. In various embodiments, a display panel includes an array of pixels. In one embodiment, among others, at least one pixel includes a switching transistor and a driving transistor coupled to the switching transistor, where the driving transistor is configured to emit light responsive to activation by the switching transistor. The driving transistor may be a dilute source enabled vertical organic light emitting transistor (DS-VOLET). The switching transistor may include a dilute source enabled vertical-field effect transistor (DS-VFET). In another embodiment, a double dilute source enabled vertical-field effect transistor (DS-VFET) includes a first DS-VFET coupled to a second DS-VFET.

Tunable Barrier Transistors For High Power Electronics
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US Patent:

20170040443, Feb 9, 2017
Filed:

Apr 24, 2015
Appl. No.:

15/305227
Inventors:

- Gainesville FL, US
XIAO CHEN - GAINESVILLE FL, US
BO LIU - GAINESVILLE FL, US
MITCHELL AUSTIN MCCARTHY - GAINESVILLE FL, US
ANDREW GABRIEL RINZLER - NEWBERRY FL, US
International Classification:

H01L 29/778
H01L 29/51
H01L 29/45
H01L 29/16
Abstract:

Various aspects of tunable barrier transistors that can be used in high power electronics are provided. In one example, among others, a tunable barrier transistor includes an inorganic semiconducting layer; a source electrode including a nano-carbon film disposed on the inorganic semiconducting layer; a gate dielectric layer disposed on the nano-carbon film; and a gate electrode disposed on the gate dielectric layer over at least a portion of the nano-carbon film. The nano-carbon film can form a source-channel interface with the inorganic semiconducting layer. A gate field produced by the gate electrode can modulate a barrier height at the source-channel interface. The gate field may also modulate a barrier width at the source-channel interface.

Ambipolar Vertical Field Effect Transistor
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US Patent:

20150340631, Nov 26, 2015
Filed:

Nov 26, 2013
Appl. No.:

14/648608
Inventors:

- Gainesville FL, US
Bo Liu - Gainesville FL, US
Mitchell Austin McCarthy - Gainesville FL, US
Assignee:

University of Florida Research Foundation, Inc. - Gainesville FL
International Classification:

H01L 51/05
H01L 27/092
H01L 29/739
H01L 27/28
H01L 51/10
Abstract:

Various examples are provided for ambipolar vertical field effect transistors (VFETs). In one example, among others, an ambipolar VFET includes a gate layer; a source layer that is electrically percolating and perforated; a dielectric layer; a drain layer; and a semiconducting channel layer. The semiconducting channel layer is in contact with at least a portion of the source layer and at least a portion of the dielectric layer and the source layer and the semiconducting channel layer form a gate voltage tunable charge injection barrier. Another example includes an ambipolar vertical field effect transistor including a dielectric surface treatment layer. The semiconducting channel layer is in contact with at least a portion of the source layer and at least a portion of the dielectric surface treatment layer and where the source layer and the semiconducting channel layer form a gate voltage tunable charge injection barrier.

Brightness Compensation In A Display
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US Patent:

20150269887, Sep 24, 2015
Filed:

Nov 5, 2013
Appl. No.:

14/440513
Inventors:

- Gainesville FL, US
Andrew Gabriel Rinzler - Newberry FL, US
Mitchell Austin McCarthy - Gainesville FL, US
Assignee:

University of Florida Research Foundation, Inc. - Gainesville FL
International Classification:

G09G 3/32
Abstract:

Various examples are provided for brightness compensation in a display. In one example, a method includes identifying an IR voltage drop effect on a pixel supplied by a supply voltage line and generating a brightness signal for the pixel based at least in part on the IR voltage drop effect. In another example, a method includes calculating values of IR voltage drop corresponding to pixels fed by a common supply voltage line and providing a data line signal to each pixel that compensates for the IR voltage drop. In another example, a display device includes a matrix of pixels and a brightness controller configured to determine an IR voltage drop effect on a pixel of the matrix and generate a brightness signal for the pixel based at least in part on the IR voltage drop effect and a temporal average pixel brightness within one refreshing cycle associated with the pixel.