Mukesh Rameshbhai Patel

US Patent:

6338160, Jan 8, 2002

Filed:

Jan 20, 2000

Appl. No.:

09/488186

Inventors:

Mukesh K. Patel - Fremont CA
Chitrabhanu Dasgupta - Mountain View CA

Assignee:

Nazomi Communications, Inc. - Santa Clara CA

International Classification:

G06F 915

US Classification:

717 5, 717 4, 717 7, 717 11, 709316

Abstract:

An implementation of Java is disclosed in which references to the constant pool are implemented by using a Data Resolution Field within the constant pool entry. The Data Resolution Field acts as an index to a jump table to jump to resolve the reference or to perform the bytecode instruction. When the reference is resolved, the contents of the Data Resolution Field in the constant pool entry are modified so that the next time the bytecode is run, the resolution steps need not be done.

US Patent:

6826749, Nov 30, 2004

Filed:

May 25, 2001

Appl. No.:

09/866508

Inventors:

Mukesh K. Patel - Fremont CA
Udaykumar R. Raval - Santa Clara CA
Harihar J. Vyas - San Jose CA

Assignee:

Nazomi Communications, Inc. - Santa Clara CA

International Classification:

G06F 945

US Classification:

717148, 717118, 717147

Abstract:

A Java accelerator includes a hardware unit associated with the CPU portion, the hardware unit converting stack-based instructions, such as Java bytecodes, into register-based instructions such as the instructions which are native to the CPU. A thread lifetime unit in the hardware unit is used to maintain a count of the number of bytecodes to be executed while an active thread is loaded into the system. Once this count reaches zero or below, the operation of a/the thread in the system is stopped and the Java Virtual Machine loaded into the CPU portion in order to implement its thread manager. Additionally, a single step unit in the hardware unit allows the production of debugger indications after each stack-based instruction.

US Patent:

7080362, Jul 18, 2006

Filed:

Aug 24, 2001

Appl. No.:

09/938886

Inventors:

Mukesh K. Patel - Fremont CA, US
Jay Kamdar - Cupertino CA, US
V. R. Ranganath - Milipitas CA, US

Assignee:

Nazomi Communication, Inc. - Santa Clara CA

International Classification:

G06F 9/45

US Classification:

717139, 717136, 717137, 717118, 712 34, 712 43, 712203, 712209

Abstract:

A hardware Java™ accelerator is provided to implement portions of the Java™ virtual machine in hardware in order to accelerate the operation of the system on Java™ bytecodes. The Java™ hardware accelerator preferably includes Java™ bytecode translation into native CPU instructions. The combination of the Java™ hardware accelerator and a CPU provides a embedded solution which results in an inexpensive system to run Java™ programs for use in commercial appliances.

US Patent:

7225436, May 29, 2007

Filed:

Oct 13, 2000

Appl. No.:

09/687777

Inventors:

Mukesh K. Patel - Fremont CA, US

Assignee:

Nazomi Communications Inc. - Santa Clara CA

International Classification:

G06F 9/45
G06F 9/44
G06F 15/00

US Classification:

717139, 717118, 717148, 712 41

Abstract:

A hardware Java™ accelerator is comprised of a decode stage and a microcode stage. Separating into the decode and microcode stage allows the decode stage to implement instruction level parallelism while the microcode stage allows the conversion of a single Java™ bytecode into multiple native instructions. A reissue buffer is provided which stores the converted instructions and reissues them when the system returns from an interrupt. In this manner, the hardware accelerator need not be flushed upon an interrupt A native PC monitor is also used. While the native PC is within a specific range, the hardware accelerator is enabled to convert the Java™ bytecodes into native instructions. When the native PC is outside the range, the hardware accelerator is disabled and the CPU operates on native instructions obtained from the memory.

US Patent:

7290080, Oct 30, 2007

Filed:

Apr 1, 2003

Appl. No.:

10/405600

Inventors:

Mukesh K. Patel - Fremont CA, US

Assignee:

Nazomi Communications Inc. - Santa Clara CA

International Classification:

G06F 12/00

US Classification:

711100, 711102, 711104

Abstract:

In one embodiment, the invention provides a method for accessing memory. The method comprises sending memory transactions to a memory sub-system for a first processor to an intermediate second processor interposed on a communication path between the first processor and the memory sub-system; and controlling when the memory transactions are allowed to pass through the second processor to reach the memory sub-system.

US Patent:

8185882, May 22, 2012

Filed:

Feb 14, 2006

Appl. No.:

11/353432

Inventors:

Mukesh K Patel - Fremont CA, US
Jay Kamdar - Cupertino CA, US

Assignee:

Nazomi Communications Inc. - Santa Clara CA

International Classification:

G06F 9/45

US Classification:

717153, 717118, 717152, 711125, 711132

Abstract:

A hardware Java accelerator is provided to implement portions of the Java virtual machine in hardware in order to accelerate the operation of the system on Java bytecodes. The Java hardware accelerator preferably includes Java bytecode translation into native CPU instructions. The combination of the Java hardware accelerator and a CPU provides a embedded solution which results in an inexpensive system to run Java programs for use in commercial appliances.

US Patent:

8417096, Apr 9, 2013

Filed:

Dec 4, 2009

Appl. No.:

12/631775

Inventors:

Amir H. Gharaat - Menlo Park CA, US
James M. Barton - Alviso CA, US
Mukesh K. Patel - Fremont CA, US

Assignee:

TiVo Inc. - Alviso CA

International Classification:

H04N 9/80

US Classification:

386249

Abstract:

A method for determining a playing position of media content based on media content fingerprints is described. In an embodiment, the playing of an advertisement may be detected by determining that one or more fingerprints of media content being played are associated with an advertisement portion of the media content. In an embodiment, an advertisement may be detected by identifying the persons associated with the faces in the advertisement portion of the media content and determining that the identified persons are not actors listed for the media content. In an embodiment, the advertisement may be enhanced with additional content pertaining to the product or service being advertised. In an embodiment, the advertisement may be automatically fast-forwarded, muted, or replaced with an alternate advertisement. In an embodiment, only a non-advertisement portion of the media content may be recorded by skipping over the detected advertisement portion of the media content.

US Patent:

8473718, Jun 25, 2013

Filed:

Oct 3, 2006

Appl. No.:

11/538362

Inventors:

Mukesh K. Patel - Fremont CA, US

Assignee:

Nazomi Communications Inc. - Santa Clara CA

International Classification:

G06F 9/30
G06F 9/40
G06F 15/00

US Classification:

712209

Abstract:

A hardware Java accelerator is comprised of a decode stage and a microcode stage. Separating into the decode and microcode stage allows the decode stage to implement instruction level parallelism while the microcode stage allows the conversion of a single Java bytecode into multiple native instructions. A reissue buffer is provided which stores the converted instructions and reissues them when the system returns from an interrupt. In this manner, the hardware accelerator need not be flushed upon an interrupt. A native PC monitor is also used. While the native PC is within a specific range, the hardware accelerator is enabled to convert the Java bytecodes into native instructions. When the native PC is outside the range, the hardware accelerator is disabled and the CPU operates on native instructions obtained from the memory.