Myeong Song Kang

US Patent:

8327051, Dec 4, 2012

Filed:

Nov 20, 2007

Appl. No.:

11/986389

Inventors:

Myeong Joon Kang - San Ramon CA, US

Assignee:

SanDisk Technologies Inc. - Plano TX

International Classification:

G06F 13/12
G06F 13/38

US Classification:

710 74

Abstract:

In one embodiment, a portable handheld memory card may include a Universal Serial Bus (USB) port, USB controller circuitry, an input/output (I/O) port, a memory, and decompression circuitry configured to decompress compressed data stored in the memory. The memory card includes a housing storing the memory and exposing the USB port and the I/O port. The USB port and I/O port may be positioned to allow a same card-insertion direction irrespective of whether a host device comprises a mating USB port or a mating I/O port. In another embodiment, the memory card includes decryption circuitry to decrypt encrypted data stored in the memory, a power management unit, a host interface module, and circuitry configured to control read and write operations to the memory. The I/O port may include a Secure Digital port, and the memory may include Flash memory. Other embodiments are provided, and each of the embodiments described herein can be used alone or in combination with one another.

US Patent:

20220197787, Jun 23, 2022

Filed:

Dec 22, 2021

Appl. No.:

17/559962

Inventors:

- Gyeonggi-do, KR
Hyung Jin Lim - San Jose CA, US
Jongryool Kim - San Jose CA, US
Myeong Joon Kang - San Jose CA, US

International Classification:

G06F 12/02
G06F 12/0815

Abstract:

A heterogeneous memory system includes a memory device including first and second memories and a controller including a cache. The controller identifies memory access addresses among addresses for memory regions of the memory device; track, for a set period, a number of memory accesses for each memory access address; classify each memory access address into a frequently accessed address or a normal accessed address based on the number of memory accesses in the set period; and allocate the first memory for frequently accessed data associated with the frequently accessed address and the second memory for normal data associated with the normal accessed address.