Myung S Cho

US Patent:

7639561, Dec 29, 2009

Filed:

Mar 30, 2007

Appl. No.:

11/694813

Inventors:

Dongyun Lee - San Jose CA, US
Myung Rai Cho - San Jose CA, US
Sungjoon Kim - Cupertino CA, US

Assignee:

Silicon Image, Inc. - Sunnyvale CA

International Classification:

G11C 8/18

US Classification:

36523311, 3652331, 36523312

Abstract:

A multi-port memory device having two or more ports wherein each port may operate at a different speed. The multi-port memory device contains memory banks that may be accessed via the two or more ports. Two clock signals are applied to each port: a system clock and a port clock. The system clock is applied to port logic that interfaces with the memory banks so that the ports all operate at a common speed with respect to the memory banks. The port clock is applied to a clock divider circuit that is associated with each port. The port clock is divided to a desired frequency or kept at its original frequency. Such a configuration allows the ports to operate at different speeds that may be set on a port-by-port basis.

US Patent:

7831778, Nov 9, 2010

Filed:

Mar 23, 2007

Appl. No.:

11/690629

Inventors:

Myung Rai Cho - San Jose CA, US
Dongyun Lee - San Jose CA, US
Alan Ruberg - Menlo Park CA, US

Assignee:

Silicon Image, Inc. - Sunnyvale CA

International Classification:

G06F 12/00
G06F 13/00
G06F 13/28
G06F 9/00
G06F 9/24
G06F 15/177

US Classification:

711147, 713 1, 713 2, 711E12039

Abstract:

A method and system that utilizes a shared nonvolatile memory for initializing multiple processing components in a device. The startup logic and configuration data for processing components within a device is stored in a single nonvolatile memory. Upon receipt of a command to initialize the device, the shared memory system copies the startup logic and configuration data from the nonvolatile memory to a volatile main memory. Then, each processing component accesses the main memory to find its startup logic and configuration data and begin executing. The shared memory system reduces the number of nonvolatile memory components used to initialize multiple processing components.

US Patent:

7949863, May 24, 2011

Filed:

Mar 30, 2007

Appl. No.:

11/694819

Inventors:

Alan T. Ruberg - Menlo Park CA, US
Dae Kyeung Kim - San Jose CA, US
Daeyun Shim - Cupertino CA, US
Dongyun Lee - San Jose CA, US
Myung Rai Cho - San Jose CA, US
Sungjoon Kim - Cupertino CA, US

Assignee:

Silicon Image, Inc. - Sunnyvale CA

International Classification:

G06F 9/48
G06F 15/76

US Classification:

712244, 712 40

Abstract:

A method and system for inter-port communication utilizing a multi-port memory device. The memory device contains an interrupt register, an interrupt signal interface (e. g. , a dedicated pin), an interrupt mask, and one or more message buffers associated with each port. When a first component coupled to a first port of the memory device wants to communicate with a second component coupled to a second port of the memory device, the first component writes a message to a message buffer associated with the second port. An interrupt in the input register of the second port is set to notify the second component coupled to the second port that a new message is available. Upon receiving the interrupt, the second component reads the interrupt register to determine the nature of the interrupt. The second component then reads the message from the message buffer.

US Patent:

20160119302, Apr 28, 2016

Filed:

May 16, 2014

Appl. No.:

14/279316

Inventors:

- Sunnyvale CA, US
Wooseung Yang - San Jose CA, US
Myung Je Cho - San Jose CA, US
Hoon Choi - Mountain View CA, US

Assignee:

Silicon Image, Inc. - Sunnyvale CA

International Classification:

H04L 29/06

Abstract:

A system for receiving and decrypting media content encrypted according to the HDCP protocol is described herein. A receiving device coupled to a plurality of content channels includes an authentication engine to authenticate each content channel and to generate an initial session key associated with each authenticated content channel. The content channels can be, for example, an HDMI channel or an MHL3 channel. A session key indicator indicating a session key used to encrypt media content is received, and an updated session key is generated. The receiving device also includes a stream cipher engine configured to decrypt received encrypted media content using the updated session key. Decrypted media content can then be displayed, for instance on a display of the receiving device.

US Patent:

20150215058, Jul 30, 2015

Filed:

Jan 24, 2014

Appl. No.:

14/163981

Inventors:

- Sunnyvale CA, US
Wooseung Yang - Sunnyvale CA, US
Myung Je Cho - Sunnyvale CA, US
Hoon Choi - Sunnyvale CA, US

Assignee:

Silicon Image, Inc. - Sunnyvale CA

International Classification:

H04J 3/06
H04W 56/00

Abstract:

A mechanism for facilitating dynamic counter synchronization and packetization for data streams being communicated over communication devices is described. In one embodiment, a method includes detecting an audio/video (A/V) data stream being encrypted and/or decrypted using one or more high-bandwidth digital content protection (HDCP) engines, where the A/V data stream is communicated between a source device and a sink device. The method may further include dividing a video stream portion of the A/V data stream into a plurality of frames if the A/V data stream relates to a high-definition multimedia interface (HDMI), and synchronizing counter values with indicators within the plurality of frames.