Naveen L Chava
age ~49
from Austin, TX
- Also known as:
-
- Chava Naveen
- Chava N
Naveen Chava Phones & Addresses
- Austin, TX
- Allen, TX
- 602 Crested Cove Dr, Garland, TX 75040
- Mesquite, TX
- 4012 Tabernash, Richardson, TX 75082
- Chicago, IL
- Santa Clara, CA
- Dallas, TX
- Syracuse, NY
Work
-
Company:SicontechApr 2012
-
Address:Bangalore
-
Position:Founder and ceo
Education
-
Degree:MS
-
School / High School:Syracuse University1996 to 1998
-
Specialities:Electrical engineering
Skills
Asic • Soc • Vlsi • Eda • Physical Design • Integrated Circuit Design • Semiconductors • Timing Closure • Rtl Design • Static Timing Analysis • Ic • Verilog • Dft • Tcl • Logic Synthesis • Mixed Signal • Testing • Cmos • Debugging • Functional Verification • Vhdl • Fpga • Physical Verification • Floorplanning • Analog Circuit Design • Place and Route • Perl • Power Management • Drc • Modelsim • Primetime • Low Power Design
Industries
Semiconductors
Name / Title
Company / Classification
Phones & Addresses
Manager, President
SICON DESIGN TECHNOLOGIES PVT. LTD
Business Services · Mfg Semiconductors/Related Devices
Business Services · Mfg Semiconductors/Related Devices
14401 American Kestrel Dr, Austin, TX 78738
Director
POWERSQUARE INC
Business Services at Non-Commercial Site · Nonclassifiable Establishments
Business Services at Non-Commercial Site · Nonclassifiable Establishments
14401 American Kestrel Dr, Austin, TX 78738
Resumes
Chief Executive Officer
view sourceLocation:
560 south Winchester Blvd, San Jose, CA 95128
Industry:
Semiconductors
Work:
SiConTech - Bangalore since Apr 2012
Founder and CEO
Silabtech Pvt Ltd - Bengaluru Area, India since Apr 2012
Co-Founder
Dataway Solution - Bengaluru Area, India since Oct 2011
Managing Director
SiCon Design Technologies Sep 2010 - Mar 2012
VP, Business Development
Texas Instruments India Jan 2009 - Aug 2010
Project Manager
Founder and CEO
Silabtech Pvt Ltd - Bengaluru Area, India since Apr 2012
Co-Founder
Dataway Solution - Bengaluru Area, India since Oct 2011
Managing Director
SiCon Design Technologies Sep 2010 - Mar 2012
VP, Business Development
Texas Instruments India Jan 2009 - Aug 2010
Project Manager
Education:
Syracuse University 1996 - 1998
MS, Electrical engineering Birla Institute of Technology and Science 1992 - 1996
BE(hons), Electrical and Electronics Little Flower Public School
MS, Electrical engineering Birla Institute of Technology and Science 1992 - 1996
BE(hons), Electrical and Electronics Little Flower Public School
Skills:
Asic
Soc
Vlsi
Eda
Physical Design
Integrated Circuit Design
Semiconductors
Timing Closure
Rtl Design
Static Timing Analysis
Ic
Verilog
Dft
Tcl
Logic Synthesis
Mixed Signal
Testing
Cmos
Debugging
Functional Verification
Vhdl
Fpga
Physical Verification
Floorplanning
Analog Circuit Design
Place and Route
Perl
Power Management
Drc
Modelsim
Primetime
Low Power Design
Soc
Vlsi
Eda
Physical Design
Integrated Circuit Design
Semiconductors
Timing Closure
Rtl Design
Static Timing Analysis
Ic
Verilog
Dft
Tcl
Logic Synthesis
Mixed Signal
Testing
Cmos
Debugging
Functional Verification
Vhdl
Fpga
Physical Verification
Floorplanning
Analog Circuit Design
Place and Route
Perl
Power Management
Drc
Modelsim
Primetime
Low Power Design
Youtube
Googleplus
Naveen Chava
Naveen Chava
Naveen Chava
Get Report for Naveen L Chava from Austin, TX, age ~49