Neal A Galbo

US Patent:

7594063, Sep 22, 2009

Filed:

Nov 19, 2004

Appl. No.:

10/993692

Inventors:

Petro Estakhri - Pleasanton CA, US
Martin Ragnar Furuhjelm - Grass Valley CA, US
Ngon Le - Sunnyvale CA, US
Jerrold Allen Beckmann - San Jose CA, US
Neal Anthony Galbo - Boca Raton FL, US
Steffen Markus Hellmold - Novato CA, US
Jarreth Romero Solomon - Mountain View CA, US

Assignee:

Lexar Media, Inc. - Fremont CA

International Classification:

G06F 12/00

US Classification:

711103

Abstract:

In one embodiment of the present invention, a memory device is disclosed to include memory organized into blocks, each block having a status associated therewith and all of the blocks of the nonvolatile memory having collectively a capacity status associated therewith and a display for showing the capacity status even when no power is being applied to the display.

US Patent:

7949822, May 24, 2011

Filed:

Sep 8, 2009

Appl. No.:

12/555574

Inventors:

Petro Estakhri - Pleasanton CA, US
Martin Ragnar Furuhjelm - Grass Valley CA, US
Ngon Le - Sunnyvale CA, US
Jerrold Allen Beckmann - San Jose CA, US
Neal Anthony Galbo - Boca Raton FL, US
Steffen Markus Hellmold - Novato CA, US
Jarreth Romero Solomon - Mountain View CA, US

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G06F 12/00

US Classification:

711103

Abstract:

In one embodiment of the present invention, a memory device is disclosed to include memory organized into blocks, each block having a status associated therewith and all of the blocks of the nonvolatile memory having collectively a capacity status associated therewith and a display for showing the capacity status even when no power is being applied to the display.

US Patent:

8166488, Apr 24, 2012

Filed:

Jan 16, 2007

Appl. No.:

11/654290

Inventors:

Neal Anthony Galbo - Boca Raton FL, US
Berhanu Iman - Sunyvale CA, US
Ngon Le - Santa Clara CA, US

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G06F 3/00
G06F 9/44
G06F 9/46
G06F 13/00

US Classification:

719321, 714 61, 714763

Abstract:

Methods of directly accessing a mass storage data device without communicating through an operating system layer are useful in recovering information previously stored in the mass storage device.

US Patent:

8189420, May 29, 2012

Filed:

Jun 4, 2009

Appl. No.:

12/478422

Inventors:

James Cooke - Boise ID, US
Peter Feeley - Boise ID, US
Victor Tsai - Palo Alto CA, US
William H. Radke - Los Gatos CA, US
Neal Galbo - Boca Raton FL, US
Chad Cobbley - Boise ID, US

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G11C 5/14

US Classification:

365226, 365227, 711115

Abstract:

Memory devices, connectors and methods for terminating an operation are provided, including a memory device configured to terminate an internal operation such as a programming or erase operation responsive to receiving a signal during removal of the memory device from a connector, such as a socket. The memory device may be specially configured to generate the removal signal, such as by including a dedicated removal terminal. The memory card may respond to the signal by terminating a programming or erase operation before power is lost. The removal terminal may have a dimension that is different from a dimension of a power terminal through which the memory device receives power. Alternatively, the connector may be specially configured to generate a signal that causes a host to terminate programming or erase operations in the memory device prior to memory card removal, such as by including a switch that is actuated when the memory device moves to a pre-power loss position.

US Patent:

8225052, Jul 17, 2012

Filed:

Jun 3, 2009

Appl. No.:

12/477204

Inventors:

Neal A. Galbo - Boca Raton FL, US
Peter Feeley - Boise ID, US
William H. Radke - Los Gatos CA, US
Victor Y. Tsai - Palo Alto CA, US
Robert N. Leibowitz - Boise ID, US

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G06F 12/00

US Classification:

711156, 711103

Abstract:

The present disclosure includes methods for controlling host memory access with a memory device, systems, host controllers and memory devices. One embodiment for controlling host memory access with a memory device includes receiving at least one command from a host and controlling execution of the at least one command with the memory device.

US Patent:

8238244, Aug 7, 2012

Filed:

Aug 10, 2009

Appl. No.:

12/538607

Inventors:

William H. Radke - Los Gatos CA, US
Victor Y. Tsai - Palo Alto CA, US
Peter Feeley - Boise ID, US
Neal A. Galbo - Boca Raton FL, US
Robert N. Leibowitz - Boise ID, US

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

H04L 12/56

US Classification:

370235, 370230

Abstract:

The present disclosure includes methods, devices, and systems for packet processing. One method embodiment for packet flow control includes deconstructing a transport layer packet into a number of link-control layer packets, wherein each of the link-control layer packets has an associated sequence number, communicating the number of link-control layer packets via a common physical connection for a plurality of peripheral devices, and limiting a number of outstanding link-control layer packets during the communication.

US Patent:

8245024, Aug 14, 2012

Filed:

Aug 21, 2009

Appl. No.:

12/545689

Inventors:

William H. Radke - Los Gatos CA, US
Victor Y. Tsai - Palo Alto CA, US
Peter Feeley - Boise ID, US
Neal A. Galbo - Boca Raton FL, US
Robert N. Leibowitz - Boise ID, US

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G06F 9/00
G06F 9/24
G06F 3/00

US Classification:

713 2, 713 1, 710 10

Abstract:

The present disclosure includes methods, devices, and systems for booting in systems having devices coupled in a chained configuration. One or more embodiments include a host and a number of devices coupled to the host in a chained configuration, wherein at least one of the number of devices is a bootable device and the at least one bootable device is not directly coupled to the host.

US Patent:

8271697, Sep 18, 2012

Filed:

Sep 29, 2009

Appl. No.:

12/569661

Inventors:

William H. Radke - Los Gatos CA, US
Victor Y. Tsai - Palo Alto CA, US
James Cooke - Boise ID, US
Neal A. Galbo - Boca Raton FL, US
Peter Feeley - Boise ID, US

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G06F 3/00
G06F 13/00

US Classification:

710 14, 710 5, 710 8, 710 15, 710 22, 710 29, 710 33, 710 52

Abstract:

The present disclosure includes methods, devices, and systems for state change in systems having devices coupled in a chained configuration. A number of embodiments include a host and a number of devices coupled to the host in a chained configuration. The chained configuration includes at least one device that is not directly coupled to the host. The at least one device that is not directly coupled to the host is configured to change from a first communication state to a second communication state responsive to receipt of a command from the host.