Nicole T Ellis

US Patent:

20080085609, Apr 10, 2008

Filed:

Jul 31, 2006

Appl. No.:

11/461033

Inventors:

James E. Vasek - Austin TX, US
Nicole R. Ellis - Austin TX, US

International Classification:

H01L 21/31

US Classification:

438780

Abstract:

A method for protecting at least one high-topography region on a substrate having both the at least one high-topography region and the at least one low-topography region is provided. The method comprises patterning a thick photo-resist layer having a first thickness, such that the thick photo-resist layer is formed on at least a portion of only the at least one high-topography region, wherein the high-topography region comprises a plurality of semiconductor devices of a first type. The method further comprises patterning a thin photo-resist layer having a second thickness, wherein the first thickness is greater than the second thickness, such that the patterned thin photo-resist layer is formed on at least a portion of only the at least one low-topography region. The method further comprises forming a plurality of semiconductor devices of a second type in the at least the portion of the low-topography region. The method further comprises removing both the thick photo-resist layer and the thin photo-resist layer.