Paul S Rotker

US Patent:

6708238, Mar 16, 2004

Filed:

Jan 19, 2001

Appl. No.:

09/766163

Inventors:

Paul S. Rotker - Groton MA

Assignee:

Sun Microsystems, Inc. - Palo Alto CA

International Classification:

G06F 1300

US Classification:

710 58, 713401

Abstract:

An IO cell for providing a transmission path for a binary signal. The IO cell includes an IO buffer for amplifying the binary signal. A programmable delay element is electrically connected to the IO buffer such that the binary signal transmits from the programmable delay element to the IO buffer. The delay element is responsive to ânâ number of programmable binary bits to selectively delay transmission of the binary signal by a set of predetermined delay time ranges. An IO pad is connected in series with the IO buffer and the programmable delay element.

US Patent:

56873107, Nov 11, 1997

Filed:

Mar 15, 1996

Appl. No.:

8/616976

Inventors:

Paul Stuart Rotker - West Newton MA
Randall Dean Hinrichs - Nashua NH

Assignee:

Digital Equipment Corporation - Maynard MA

International Classification:

G06F 1100

US Classification:

39518209

Abstract:

An apparatus which provides a means of ensuring command synchronization for computer systems employing sliced gate array processors includes a computer bus, a plurality of central processing units and a plurality of input/output processors coupled to the computer bus. Each input/output processor includes means to receive commands from said central processing units. The apparatus further includes means within each of the input/output processors for generating a signal indicating the type of command received from the central processing units and means for receiving from every other input/output processor the command type signal generated by every other input/output processor. In addition, the apparatus further includes means for comparing said command type signals and generating an error signal when the comparison indicates that all of the input/output processors have not received the same command.

US Patent:

54447178, Aug 22, 1995

Filed:

Dec 18, 1992

Appl. No.:

7/993339

Inventors:

Paul S. Rotker - West Newton MA
Nicholas A. Warchol - Boxborough MA

Assignee:

Digital Equipment Corporation - Maynard MA

International Classification:

G01R 313183

US Classification:

371 27

Abstract:

A method of testing an integrated circuit having a plurality of pins includes the steps of providing a functional test set having an ordered group of test strings wherein each element of the test string is related to one of the pins of said integrated circuit. The group of test strings is searched to locate a sequence of test strings having a undesirable pattern. The undesirable pattern can be a pattern in which none of the elements associated with the test string changes or a pattern in which a reference element and at least one other element of the test string changes. When a sequence of test strings having the undesirable pattern is located, the group of test strings is processed to correct the undesirable pattern. When all the vector sequences having an undesirable patterns are corrected, the group of test vectors is applied to the input pins of the integrated circuit.

US Patent:

52630307, Nov 16, 1993

Filed:

Feb 13, 1991

Appl. No.:

7/654499

Inventors:

Paul S. Rotker - West Newton MA
Eric W. Ertel - Milford MA

Assignee:

Digital Equipment Corporation - Maynard MA

International Classification:

G06F 1108
H03M 1300
H03M 1322

US Classification:

371 391

Abstract:

A data encoding system for storing data on a "c"-channel tape interleaves and encodes "b" multi-symbol data blocks as they are being serially sent to the tape for storage, using a (b+k,k) error correction code to generate k multi-symbol ECC blocks. It then serially records the k ECC blocks. The system receives corresponding data symbols from the first c data blocks in a predetermined order and applies the symbols both to the tape for recording and to an encoder. The encoder, before it receives the data symbols is set to a predetermined state. The encoder then manipulates the data and generates residue symbols associated with both the manipulation of the received data symbols and the state of the encoder immediately prior to such manipulation, and temporarily stores the generated residue symbols. Next, the system retrieves stored residue symbols which are associated with selected data symbols from previously recorded data blocks, sets the encoder to a state identified by the retrieved symbols and repeats its encoding, recording and storing processes for all received data symbols, as the received data symbols are being serially recorded on the tape. After the b data blocks are recorded, the system records the residue symbols corresponding to the manipulation of b data blocks.

US Patent:

20190319627, Oct 17, 2019

Filed:

Jun 28, 2019

Appl. No.:

16/456491

Inventors:

- Santa Clara CA, US
Paul Rotker - San Jose CA, US

International Classification:

H03K 19/177
H01L 23/00
H01L 25/065
H01L 27/02

Abstract:

An integrated circuit device is disclosed that includes an interposer and a programmable fabric die disposed on the interposer. The programmable fabric die includes multiple sectors that each have multiple rows of logic element blocks. Each row of logic element blocks includes multiple microbumps. Each logic element block has programmable fabric circuitry and an input/output interface electrically coupled to a respective microbump. The integrated circuit device also includes a device disposed on the interposer external to the programmable fabric die and electrically coupled to the microbumps via the interposer.